原创 ASSET & Arium tackle SoC visibility

No company can afford to remain still, and it is usually said that, if you don't make yourself obsolete, someone else will.

Sometimes it's not another company but an industry trend, such as the increasing complexity of SoCs, where lots of functionality is buried in the device with no way to access it externally. When the internal information necessary for debugging does come out, it often uses high-speed IO. The traces may never see the light of day on the board, making probing both difficult and disruptive to the signal itself. The test equipment of old just won't cut it anymore.

ASSET InterTech sees the writing on the wall and wants to be ahead of the curve in providing a suite of tools that lets companies test hardware and validate software using the very latest capabilities built into today's silicon. It wants to use the hooks and capabilities built into the chip (many of which were used for design verification) and make them accessible to the end users of those chips. To that end, the company has acquired Arium, a company that provides software debug tools for Intel- and ARM-based chips.

Unlike some test equipment companies that are providing on-chip instrumentation, ASSET makes use of any and all capabilities that are built into the chip, including things such as the recently announced Intel Silicon View Technology. This is a set of capabilities embedded into Intel processors that enable platform debug, electrical validation and board manufacturing test solutions.

ASSET is also working on an interesting piece of technology that will interest the FPGA guys—or at least the board designers that have to work with FPGAs. Glenn Woppman, president and CEO of ASSET, told me the board is often designed and fabricated long before the designers have any code to put into the FPGA, so the board sits there gathering dust and untested. What if the designers could verify everything before the Verilog code is ready?

That is where the yet-to-be-announced product would come into play. It would be loaded into the FPGA and would let designers test the board and connectivity. ASSET is working with a customer on this at the moment, and it expects to announce an extension of the pilot this year.

Both ASSET and Arium are private companies, and no financial details associated with the deal were announced. Larry Traylor, president of Arium, will be a vice president within the merged entity.

Brian Bailey
EE Times