原创 Review of Sanjay Churiwala, Sapan Garg's Principles of VLSI RTL Design – A Pract

Generally speaking, there are only so many books I can read on RTL design before my eyes start to glaze over. Given that, there's the occasional gem that's well worth a read. One example is Sanjay Churiwala and Sapan Garg'sPrinciples of VLSI RTL Design – A Practical Guide.

There are several things to note about this book, starting with the fact that it's written by people who actually know what they are talking about (sadly, this is less common than one might hope).

It's also important to understand that this book is not intended to teach you about any particular flavour of Register Transfer Level (RTL) hardware description language (HDL) like Verilog or VHDL. The idea is to teach you how to write better RTL.

The thing is that there are a lot of very competent RTL designers when it comes to understanding an architectural or functional requirement and generating some RTL that will "do the job". What this book does is to take things to the next level by making you realise the downstream implications of any decisions you make while coding your RTL. For example, the way in which you code your RTL may affect testability, data synchronisation across clock domains, synthesisability, power consumption, routability, and so forth.

Thus, the book walks us through various aspects associated with the following topics:

* Ensuring RTL intent
* Creating simulation-friendly RTL
* Creating timing-analysis-friendly RTL
* Creating clock-domain-crossing (CDC) RTL
* Creating power-friendly RTL
* Creating DFT-friendly RTL
* Creating timing-exceptions friendly RTL
* Creating congestion-conscious RTL
This isn't a huge book – approximately 180 pages – but it's jam-packed with useful information. Also, it's written in a chatty, conversational style that will appeal to a lot of people (I personally like it a lot), but not to others (but they are grumpy little rascals and they don't count, so let's not worry about them).

Both of the authors work for Atrenta, which provides SoC Realisation solutions for the semiconductor and electronic systems industries. I've always been impressed with the folks at Atrenta and with their solutions. With regard to this book, the various members of Atrenta's SpyGlass family of products are absolutely relevant with regard to ensuring "XYZ-friendly RTL" ... so one thing that really impressed me here is that the authors studiously managed to avoid mentioning Atrenta or SpyGlass in any way. It's so easy for a technical book to end up as a marketing exercise – so all credit to the authors for not falling into this trap.

The list price is $129, although it's currently available for $102 from Amazon.com. On the one hand this is a tad expensive – on the other hand, if coding RTL is what you do a lot of and this makes you better at doing it, then $102 may be a bargain (especially if you can persuade your company to buy it for you).

The bottom line is that if you spend a lot of time coding RTL, or if you are hoping to become a member of the RTL design engineering fraternity, then I think that reading this book would be well worth your time.