原创 DSP与Simulink设计之CMD文件

2011-5-27 14:02 3543 13 14 分类: 处理器与DSP

1 概述
基于Matlab的Simulink生成的CMD文件根据系统定制配置,只限于在RAM中运行。
目的:更改CMD文件,程序烧写到FLASH中运行。
2 Simulink生成CMD介绍
生成的CMD文件在RAM中运行,无法烧写到FLASH中运行。
(1)此段CMD文件为Simulink自动生成的文件。
MEMORY
{
PAGE 0:
    BEGINRAM: origin=0x0, length=0x2
    RAMM0: origin=0x2, length=0x3fe
    RAMH0: origin=0xa000, length=0x2000
    OTP: origin=0x3d7800, length=0x800
    FLASH: origin=0x3e8000, length=0xfff6
    BEGINFLASH: origin=0x3f7ff6, length=0x2
    CSM_PWL: origin=0x3f7ff8, length=0x8
    BOOTROM: origin=0x3ff000, length=0xfc0
    RESET: origin=0x3fffc0, length=0x2
    VECTORS: origin=0x3fffc2, length=0x3e
PAGE 1:
    RAMM1: origin=0x400, length=0x400
    RAML0L1: origin=0x8000, length=0x2000
}
SECTIONS
{
    .vectors: load = 0x000000000
    .text: > RAMH0, PAGE = 0
    .switch: > RAMH0, PAGE = 0
    .bss: > RAML0L1, PAGE = 1
    .ebss: > RAML0L1, PAGE = 1
    .far: > RAML0L1, PAGE = 1
    .cinit: > RAMH0, PAGE = 0
    .pinit: > RAMH0, PAGE = 0
    .const: > RAML0L1, PAGE = 1
    .econst: > RAML0L1, PAGE = 1
    .reset: > RESET, PAGE = 0, TYPE = DSECT
    .data: > RAML0L1, PAGE = 1
    .cio: > RAML0L1, PAGE = 1
    .sysmem: > RAML0L1, PAGE = 1
    .esysmem: > RAML0L1, PAGE = 1
    .stack: > RAMM1, PAGE = 1
    .rtdx_text: > RAMH0, PAGE = 0
    .rtdx_data: > RAML0L1, PAGE = 1
    IQmath: > RAMH0, PAGE = 0
    codestart: > BEGINRAM, PAGE = 0
    csmpasswds: > CSM_PWL, PAGE = 0
    csm_rsvd: > RAMM0, PAGE = 0
    ramfuncs: > RAMH0, PAGE = 0
    IQmathTables: > BOOTROM, PAGE = 0, TYPE = NOLOAD
}
-l
"C:\Program Files\MATLAB\R2009a\toolbox\rtw\targets\ccslink\ccslink\c2000\c280xPeripherals.cmd"
(2)以下为连接路径的CMD文件,c280xPeripherals.cmd。
MEMORY
{
PAGE 0:    /* Program Memory */
PAGE 1 :   /* Data Memory */
   /**/
   DEV_EMU     : origin = 0x000880, length = 0x000180     /* device emulation registers */
   FLASH_REGS  : origin = 0x000A80, length = 0x000060     /* FLASH registers */
   CSM         : origin = 0x000AE0, length = 0x000010     /* code security module registers */
  
   ADC_MIRROR  : origin = 0x000B00, length = 0x000010     /* ADC Results register mirror */
  
   CPU_TIMER0  : origin = 0x000C00, length = 0x000008     /* CPU Timer0 registers */
   CPU_TIMER1  : origin = 0x000C08, length = 0x000008     /* CPU Timer0 registers (CPU Timer1 & Timer2 reserved TI use)*/
   CPU_TIMER2  : origin = 0x000C10, length = 0x000008     /* CPU Timer0 registers (CPU Timer1 & Timer2 reserved TI use)*/

   PIE_CTRL    : origin = 0x000CE0, length = 0x000020     /* PIE control registers */
   PIE_VECT    : origin = 0x000D00, length = 0x000100     /* PIE Vector Table */

   ECANA       : origin = 0x006000, length = 0x000040     /* eCAN-A control and status registers */
   ECANA_LAM   : origin = 0x006040, length = 0x000040     /* eCAN-A local acceptance masks */
   ECANA_MOTS  : origin = 0x006080, length = 0x000040     /* eCAN-A message object time stamps */
   ECANA_MOTO  : origin = 0x0060C0, length = 0x000040     /* eCAN-A object time-out registers */
   ECANA_MBOX  : origin = 0x006100, length = 0x000100     /* eCAN-A mailboxes */

   ECANB       : origin = 0x006200, length = 0x000040     /* eCAN-B control and status registers */
   ECANB_LAM   : origin = 0x006240, length = 0x000040     /* eCAN-B local acceptance masks */
   ECANB_MOTS  : origin = 0x006280, length = 0x000040     /* eCAN-B message object time stamps */
   ECANB_MOTO  : origin = 0x0062C0, length = 0x000040     /* eCAN-B object time-out registers */
   ECANB_MBOX  : origin = 0x006300, length = 0x000100     /* eCAN-B mailboxes */

   EPWM1       : origin = 0x006800, length = 0x000022     /* Enhanced PWM 1 registers */
   EPWM2       : origin = 0x006840, length = 0x000022     /* Enhanced PWM 2 registers */
   EPWM3       : origin = 0x006880, length = 0x000022     /* Enhanced PWM 3 registers */
   EPWM4       : origin = 0x0068C0, length = 0x000022     /* Enhanced PWM 4 registers */
   EPWM5       : origin = 0x006900, length = 0x000022     /* Enhanced PWM 5 registers */
   EPWM6       : origin = 0x006940, length = 0x000022     /* Enhanced PWM 6 registers */

   ECAP1       : origin = 0x006A00, length = 0x000020     /* Enhanced Capture 1 registers */
   ECAP2       : origin = 0x006A20, length = 0x000020     /* Enhanced Capture 2 registers */
   ECAP3       : origin = 0x006A40, length = 0x000020     /* Enhanced Capture 3 registers */
   ECAP4       : origin = 0x006A60, length = 0x000020     /* Enhanced Capture 4 registers */        

   EQEP1       : origin = 0x006B00, length = 0x000040     /* Enhanced QEP 1 registers */
   EQEP2       : origin = 0x006B40, length = 0x000040     /* Enhanced QEP 2 registers */  

   GPIOCTRL    : origin = 0x006F80, length = 0x000040     /* GPIO control registers */
   GPIODAT     : origin = 0x006FC0, length = 0x000020     /* GPIO data registers */
   GPIOINT     : origin = 0x006FE0, length = 0x000020     /* GPIO interrupt/LPM registers */
   SYSTEM      : origin = 0x007010, length = 0x000020     /* System control registers */
   SPIA        : origin = 0x007040, length = 0x000010     /* SPI-A registers */
   SCIA        : origin = 0x007050, length = 0x000010     /* SCI-A registers */
   XINTRUPT    : origin = 0x007070, length = 0x000010     /* external interrupt registers */

   ADC         : origin = 0x007100, length = 0x000020     /* ADC registers */
   SPIB        : origin = 0x007740, length = 0x000010     /* SPI-B registers */

   SCIB        : origin = 0x007750, length = 0x000010     /* SCI-B registers */
   SPIC        : origin = 0x007760, length = 0x000010     /* SPI-C registers */

   SPID        : origin = 0x007780, length = 0x000010     /* SPI-D registers */
  
   I2CA        : origin = 0x007900, length = 0x000040     /* I2C-A registers */
   CSM_PWL     : origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA.  CSM password locations. */  
}

SECTIONS
{
/*** Peripheral Frame 0 Register Structures ***/
   DevEmuRegsFile    : > DEV_EMU,     PAGE = 1
   FlashRegsFile     : > FLASH_REGS,  PAGE = 1
   CsmRegsFile       : > CSM,         PAGE = 1
   AdcMirrorFile     : > ADC_MIRROR,  PAGE = 1  
   CpuTimer0RegsFile : > CPU_TIMER0,  PAGE = 1
   CpuTimer1RegsFile : > CPU_TIMER1,  PAGE = 1
   CpuTimer2RegsFile : > CPU_TIMER2,  PAGE = 1 
   PieCtrlRegsFile   : > PIE_CTRL,    PAGE = 1     

/*** Peripheral Frame 1 Register Structures ***/
   SysCtrlRegsFile   : > SYSTEM,      PAGE = 1
   SpiaRegsFile      : > SPIA,        PAGE = 1
   SciaRegsFile      : > SCIA,        PAGE = 1
   XIntruptRegsFile  : > XINTRUPT,    PAGE = 1
   AdcRegsFile       : > ADC,         PAGE = 1
   SpibRegsFile      : > SPIB,        PAGE = 1
   ScibRegsFile      : > SCIB,        PAGE = 1
   SpicRegsFile      : > SPIC,        PAGE = 1
   SpidRegsFile      : > SPID,        PAGE = 1
   I2caRegsFile      : > I2CA,        PAGE = 1

/*** Peripheral Frame 2 Register Structures ***/
   ECanaRegsFile     : > ECANA,       PAGE = 1
   ECanaLAMRegsFile  : > ECANA_LAM    PAGE = 1  
   ECanaMboxesFile   : > ECANA_MBOX   PAGE = 1
   ECanaMOTSRegsFile : > ECANA_MOTS   PAGE = 1
   ECanaMOTORegsFile : > ECANA_MOTO   PAGE = 1
  
   ECanbRegsFile     : > ECANB,       PAGE = 1
   ECanbLAMRegsFile  : > ECANB_LAM    PAGE = 1  
   ECanbMboxesFile   : > ECANB_MBOX   PAGE = 1
   ECanbMOTSRegsFile : > ECANB_MOTS   PAGE = 1
   ECanbMOTORegsFile : > ECANB_MOTO   PAGE = 1
  
   EPwm1RegsFile     : > EPWM1        PAGE = 1  
   EPwm2RegsFile     : > EPWM2        PAGE = 1  
   EPwm3RegsFile     : > EPWM3        PAGE = 1  
   EPwm4RegsFile     : > EPWM4        PAGE = 1  
   EPwm5RegsFile     : > EPWM5        PAGE = 1  
   EPwm6RegsFile     : > EPWM6        PAGE = 1
  
  ECap1RegsFile     : > ECAP1        PAGE = 1  
   ECap2RegsFile     : > ECAP2        PAGE = 1  
   ECap3RegsFile     : > ECAP3        PAGE = 1  
   ECap4RegsFile     : > ECAP4        PAGE = 1

   EQep1RegsFile     : > EQEP1        PAGE = 1  
   EQep2RegsFile     : > EQEP2        PAGE = 1              

   GpioCtrlRegsFile  : > GPIOCTRL     PAGE = 1
   GpioDataRegsFile  : > GPIODAT      PAGE = 1
   GpioIntRegsFile   : > GPIOINT      PAGE = 1
          
/*** Code Security Module Register Structures ***/
   CsmPwlFile        : > CSM_PWL,     PAGE = 1
}

3 解决方案
从Simlink生成的CMD文件入手,更改配置,烧写到FLASH。
只需更改前导部分CMD文件afe_dsp.cmd,更改如下:
MEMORY
{
PAGE 0:
    BEGINRAM: origin=0x0, length=0x2
    RAMM0: origin=0x2, length=0x3fe
    RAMH0: origin=0xa000, length=0x2000
    OTP: origin=0x3d7800, length=0x800
    FLASH: origin=0x3e8000, length=0xfff6
    BEGINFLASH: origin=0x3f7ff6, length=0x2
    CSM_PWL: origin=0x3f7ff8, length=0x8
    BOOTROM: origin=0x3ff000, length=0xfc0
    RESET: origin=0x3fffc0, length=0x2
    VECTORS: origin=0x3fffc2, length=0x3e
PAGE 1:
    RAMM1: origin=0x400, length=0x400
    RAML0L1: origin=0x8000, length=0x2000
}
SECTIONS
{
    .vectors: load = 0x000000000
    .text: > FLASH, PAGE = 0
    .switch: > FLASH, PAGE = 0
    .bss: > RAML0L1, PAGE = 1
    .ebss: > RAML0L1, PAGE = 1
    .far: > RAML0L1, PAGE = 1
    .cinit: > FLASH, PAGE = 0
    .pinit: >FLASH, PAGE = 0
    .const: > RAML0L1, PAGE = 1
    .econst: > FLASH, PAGE = 0
    .reset: > RESET, PAGE = 0, TYPE = DSECT
    .data: > RAML0L1, PAGE = 1
    .cio: > RAML0L1, PAGE = 1
    .sysmem: > RAML0L1, PAGE = 1
    .esysmem: > RAML0L1, PAGE = 1
    .stack: > RAMM1, PAGE = 1
    .rtdx_text: >FLASH, PAGE = 0
    .rtdx_data: > RAML0L1, PAGE = 1
    IQmath: > FLASH, PAGE = 0
    codestart: > BEGINFLASH, PAGE = 0
    csmpasswds: > CSM_PWL, PAGE = 0
    csm_rsvd: > RAMM0, PAGE = 0
    ramfuncs: > FLASH, PAGE = 0
    IQmathTables: > BOOTROM, PAGE = 0, TYPE = NOLOAD
}
-l "C:\Program Files\MATLAB\R2009a\toolbox\rtw\targets\ccslink\ccslink\c2000\c280xPeripherals.cmd"
更改部分:
(1)RAMH0改为 FLASH
(2) .econst: > RAML0L1, PAGE = 1改为  .econst: > FLASH, PAGE = 0
4 结论
完成Simulink生成的CMD文件的配置更改,满足了应用要求。

还可以通过Simulink进行配置,双击板子,在Sections中配置。

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xucun915_925777961 2011-5-27 16:39

不错,路过来学习一下^_^

用户1370220 2009-11-20 22:34

hehe 好文共赏吗 共同进步!

用户1364656 2009-11-20 11:41

收藏了,呵呵
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