原创 【富芮坤FR3068x-C】实现移植rtthread-nano+finsh+cmbacktrace

/*
 * Copyright (c) 2006-2019, RT-Thread Development Team
 *
 * SPDX-License-Identifier: Apache-2.0
 *
 * Change Logs:
 * Date           Author       Notes
 * 2021-05-24                  the first version
 */

#include <rthw.h>
#include <rtthread.h>
#include <stdio.h>
#include "fr30xx.h"

#if defined(RT_USING_USER_MAIN) && defined(RT_USING_HEAP)
 /*
  * Please modify RT_HEAP_SIZE if you enable RT_USING_HEAP
  * the RT_HEAP_SIZE max value = (sram size - ZI size), 1024 means 1024 bytes
  */
#define RT_HEAP_SIZE (20*1024)
static rt_uint8_t rt_heap[RT_HEAP_SIZE];

RT_WEAK void *rt_heap_begin_get(void)
{
    return rt_heap;
}

RT_WEAK void *rt_heap_end_get(void)
{
    return rt_heap + RT_HEAP_SIZE;
}
#endif

void SysTick_Handler(void)
{
    rt_interrupt_enter();

    rt_tick_increase();

    rt_interrupt_leave();
}

/**
 * This function will initial your board.
 */
void rt_hw_board_init(void)
{
    void main_entry_point(void);
    int board_init(void);

    main_entry_point();
    board_init();
    SysTick_Config(system_get_CORE_HSCLK() / RT_TICK_PER_SECOND);
    NVIC_EnableIRQ(SysTick_IRQn);

    /*
     * 1: OS Tick Configuration
     * Enable the hardware timer and call the rt_os_tick_callback function
     * periodically with the frequency RT_TICK_PER_SECOND.
     */
     // HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/RT_TICK_PER_SECOND);

     /* Call components board initial (use INIT_BOARD_EXPORT()) */
#ifdef RT_USING_COMPONENTS_INIT
    rt_components_board_init();
#endif

#if defined(RT_USING_USER_MAIN) && defined(RT_USING_HEAP)
    rt_system_heap_init(rt_heap_begin_get(), rt_heap_end_get());
#endif
}

extern int $Super$$main(void);
int $Sub$$main(void)
{
    main_entry_point();
    $Super$$main();
    return 0;
}

/*
  ******************************************************************************
  * @file    main.c
  * @author  FreqChip Firmware Team
  * @brief   main source File.
  ******************************************************************************
  * @attention
  *
  * Copyright (c) 2023 FreqChip.
  * All rights reserved.
  ******************************************************************************
*/
#include "uart_demo.h"
#include "rtthread.h"
#include "cm_backtrace.h"

#ifdef RT_USING_FINSH
uint16_t head_ptr = 0;
uint16_t tail_ptr = 0;
uint8_t data_buf[128] = { 0 };
uint8_t data_one = 0;
#endif

UART_HandleTypeDef  Uart3_handle;

int fputc(int ch, FILE *stream)
{  
    while(__UART_IS_TxFIFO_FULL(UART3));
    __UART_WRITE_FIFO(UART3, ch);

    return ch;
}

/*********************************************************************
 * @fn      system_clock_config
 *
 * @brief   System Misc Init.
 */
void system_clock_config(void)
{
    System_ClkConfig_t ClkConfig;

    /* CORE HSCLK Config */
    ClkConfig.CORE_HSCLK_CFG.CORE_HSCLK_Source = CORE_HSCLK_SEL_HES;
    /* PLL clock = HSE_VALUE*N + (HSE_VALUE/65535)*M */
    /* SPLL CLK Config */
    ClkConfig.SPLL_CFG.PowerEn = PLL_POWER_ENABLE;
    ClkConfig.SPLL_CFG.PLL_N = 8;
    ClkConfig.SPLL_CFG.PLL_M = 0;
    /* PLL clock = HSE_VALUE*N + (HSE_VALUE/65535)*M */
    /* AUPLL CLK Config */
    ClkConfig.AUPLL_CFG.PowerEn = PLL_POWER_DISABLE;
    ClkConfig.AUPLL_CFG.PLL_N = 8;
    ClkConfig.AUPLL_CFG.PLL_D = 0;
    ClkConfig.AUPLL_CFG.PLL_K = 0;    

    System_CORE_HSCLK_config(&ClkConfig.CORE_HSCLK_CFG);
    if (System_SPLL_config(&ClkConfig.SPLL_CFG,200) == -1)
        while(1);    
    if (System_AUPLL_config(&ClkConfig.AUPLL_CFG,200) == -1)
        while(1);

    ClkConfig.MCU_Clock_Source = MCU_CLK_SEL_CORE_HSCLK;
    ClkConfig.SOC_DIV  = 1;    /* This parameter is valid when MCU_Clock_Source == MCU_CLK_SEL_SPLL_CLK */
    ClkConfig.MCU_DIV  = 1;
    ClkConfig.APB0_DIV = 1;
    ClkConfig.APB1_DIV = 1;
    ClkConfig.APB2_DIV = 1;

    System_MCU_clock_Config(&ClkConfig);
}

int board_init(void)
{
    GPIO_InitTypeDef    GPIO_Handle;

    pmu_init();

    system_clock_config();

    /* Uart3 IO init */
    GPIO_Handle.Pin       = GPIO_PIN_4|GPIO_PIN_5;
    GPIO_Handle.Mode      = GPIO_MODE_AF_PP;
    GPIO_Handle.Pull      = GPIO_PULLUP;
    GPIO_Handle.Alternate = GPIO_FUNCTION_1;
    gpio_init(GPIOB, &GPIO_Handle);

    __SYSTEM_UART_CLK_SELECT_COREH();    
    Uart3_handle.UARTx = UART3;
    Uart3_handle.Init.BaudRate   = 115200;
    Uart3_handle.Init.DataLength = UART_DATA_LENGTH_8BIT;
    Uart3_handle.Init.StopBits   = UART_STOPBITS_1;
    Uart3_handle.Init.Parity     = UART_PARITY_NONE;
    Uart3_handle.Init.FIFO_Mode  = UART_FIFO_ENABLE;
    uart_init(&Uart3_handle);

#ifdef RT_USING_FINSH
    NVIC_EnableIRQ(UART3_IRQn);
    NVIC_SetPriority(UART3_IRQn, 0);
    uart_receive_IT(&Uart3_handle, &data_one, 1);
#endif

    printf("SystemCoreClock:%d\r\n", system_get_CoreClock());
    printf("SystemDSPClock:%d\r\n", system_get_DSPClock());
    printf("System_CORE_HSCLK:%d\r\n", system_get_CORE_HSCLK());
    printf("System_SPLLCLK:%d\r\n", system_get_SPLLCLK());
    printf("System_AUPLLCLK:%d\r\n", system_get_AUPLLCLK());

    cm_backtrace_init("Project", "V1.1.0", "V1.1.0");

    return 0;
}

int main(void)
{
    while (1)
    {
        printf("hello\r\n");
        rt_thread_mdelay(30000);
    }
}


#ifdef RT_USING_CONSOLE

void rt_hw_console_output(const char *str)
{
    rt_size_t i = 0, size = 0;
    char a = '\r';

    size = rt_strlen(str);

    for (i = 0; i < size; i++)
    {
        if (*(str + i) == '\n')
        {
            printf("%c", a);
        }
        printf("%c", *(str + i));
    }
}
#endif

#ifdef RT_USING_FINSH

void TEST_CMD(int argc, char **argv)
{
    printf("argc %d\r\n", argc);
}
MSH_CMD_EXPORT(TEST_CMD, test_cmd);

void uart3_irq(void)
{
    uart_IRQHandler(&Uart3_handle);

    data_buf[head_ptr++] = data_one;
    head_ptr %= 128;
    uart_receive_IT(&Uart3_handle, &data_one, 1);
}

char rt_hw_console_getchar(void)
{
    /* Note: the initial value of ch must < 0 */
    int ch = -1;

    if (head_ptr != tail_ptr)
    {
        ch = data_buf[tail_ptr];
        tail_ptr++;
        tail_ptr %= 128;
    }
    else
    {
        rt_thread_mdelay(10);
    }
    return ch;
}
#endif

/* RT-Thread config file */

#ifndef __RTTHREAD_CFG_H__
#define __RTTHREAD_CFG_H__

// <<< Use Configuration Wizard in Context Menu >>>

// <h>Basic Configuration
// <o>Maximal level of thread priority <8-256>
//  <i>Default: 32
#define RT_THREAD_PRIORITY_MAX  32
// <o>OS tick per second
//  <i>Default: 1000   (1ms)
#define RT_TICK_PER_SECOND  1000
// <o>Alignment size for CPU architecture data access
//  <i>Default: 4
#define RT_ALIGN_SIZE   4
// <o>the max length of object name<2-16>
//  <i>Default: 8
#define RT_NAME_MAX    8
// <c1>Using RT-Thread components initialization
//  <i>Using RT-Thread components initialization
#define RT_USING_COMPONENTS_INIT
// </c>

#define RT_USING_USER_MAIN

// <o>the stack size of main thread<1-4086>
//  <i>Default: 512
#define RT_MAIN_THREAD_STACK_SIZE     4096

// </h>

// <h>Debug Configuration
// <c1>enable kernel debug configuration
//  <i>Default: enable kernel debug configuration
//#define RT_DEBUG
// </c>
// <o>enable components initialization debug configuration<0-1>
//  <i>Default: 0
#define RT_DEBUG_INIT 0
// <c1>thread stack over flow detect
//  <i> Diable Thread stack over flow detect
//#define RT_USING_OVERFLOW_CHECK
// </c>
// </h>

// <h>Hook Configuration
// <c1>using hook
//  <i>using hook
//#define RT_USING_HOOK
// </c>
// <c1>using idle hook
//  <i>using idle hook
//#define RT_USING_IDLE_HOOK
// </c>
// </h>

// <e>Software timers Configuration
// <i> Enables user timers
#define RT_USING_TIMER_SOFT         0
#if RT_USING_TIMER_SOFT == 0
    #undef RT_USING_TIMER_SOFT
#endif
// <o>The priority level of timer thread <0-31>
//  <i>Default: 4
#define RT_TIMER_THREAD_PRIO        4
// <o>The stack size of timer thread <0-8192>
//  <i>Default: 512
#define RT_TIMER_THREAD_STACK_SIZE  512
// </e>

// <h>IPC(Inter-process communication) Configuration
// <c1>Using Semaphore
//  <i>Using Semaphore
#define RT_USING_SEMAPHORE
// </c>
// <c1>Using Mutex
//  <i>Using Mutex
//#define RT_USING_MUTEX
// </c>
// <c1>Using Event
//  <i>Using Event
//#define RT_USING_EVENT
// </c>
// <c1>Using MailBox
//  <i>Using MailBox
#define RT_USING_MAILBOX
// </c>
// <c1>Using Message Queue
//  <i>Using Message Queue
//#define RT_USING_MESSAGEQUEUE
// </c>
// </h>

// <h>Memory Management Configuration
// <c1>Memory Pool Management
//  <i>Memory Pool Management
//#define RT_USING_MEMPOOL
// </c>
// <c1>Dynamic Heap Management(Algorithm: small memory )
//  <i>Dynamic Heap Management
#define RT_USING_HEAP
#define RT_USING_SMALL_MEM
// </c>
// <c1>using tiny size of memory
//  <i>using tiny size of memory
//#define RT_USING_TINY_SIZE
// </c>
// </h>

// <h>Console Configuration
// <c1>Using console
//  <i>Using console
#define RT_USING_CONSOLE
// </c>
// <o>the buffer size of console <1-1024>
//  <i>the buffer size of console
//  <i>Default: 128  (128Byte)
#define RT_CONSOLEBUF_SIZE          256
// </h>

// <h>FinSH Configuration
// <c1>include finsh config
//  <i>Select this choice if you using FinSH 
#include "finsh_config.h"
// </c>
// </h>

// <h>Device Configuration
// <c1>using device framework
//  <i>using device framework
//#define RT_USING_DEVICE
// </c>
// </h>

// <<< end of configuration section >>>

#endif

/*
 * This file is part of the CmBacktrace Library.
 *
 * Copyright (c) 2016, Armink, <armink.ztl@gmail.com>
 *
 * Permission is hereby granted, free of charge, to any person obtaining
 * a copy of this software and associated documentation files (the
 * 'Software'), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sublicense, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice shall be
 * included in all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED 'AS IS', WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 * Function: It is the configure head file for this library.
 * Created on: 2016-12-15
 */

#ifndef _CMB_CFG_H_
#define _CMB_CFG_H_
#include "rtthread.h"
/* print line, must config by user */
#define cmb_println(...)               rt_kprintf(__VA_ARGS__);rt_kprintf("\r\n")/* e.g., printf(__VA_ARGS__);printf("\r\n")  or  SEGGER_RTT_printf(0, __VA_ARGS__);SEGGER_RTT_WriteString(0, "\r\n")  */
/* enable bare metal(no OS) platform */
/* #define CMB_USING_BARE_METAL_PLATFORM */
/* enable OS platform */
#define CMB_USING_OS_PLATFORM 
/* #define CMB_USING_OS_PLATFORM */
/* OS platform type, must config when CMB_USING_OS_PLATFORM is enable */
#define CMB_OS_PLATFORM_TYPE           CMB_OS_PLATFORM_RTT/* #define CMB_OS_PLATFORM_TYPE           CMB_OS_PLATFORM_RTT or CMB_OS_PLATFORM_UCOSII or CMB_OS_PLATFORM_UCOSIII or CMB_OS_PLATFORM_FREERTOS or CMB_OS_PLATFORM_RTX5 */
/* cpu platform type, must config by user */
#define CMB_CPU_PLATFORM_TYPE          CMB_CPU_ARM_CORTEX_M4/* CMB_CPU_ARM_CORTEX_M0 or CMB_CPU_ARM_CORTEX_M3 or CMB_CPU_ARM_CORTEX_M4 or CMB_CPU_ARM_CORTEX_M7 */
/* enable dump stack information */
/* #define CMB_USING_DUMP_STACK_INFO */
/* language of print information */
#define CMB_PRINT_LANGUAGE             CMB_PRINT_LANGUAGE_ENGLISH/* #define CMB_PRINT_LANGUAGE             CMB_PRINT_LANGUAGE_ENGLISH(default) or CMB_PRINT_LANGUAGE_CHINESE */
#endif /* _CMB_CFG_H_ */