原创 传统CPLD和查找表架构CPLD的布线资源对比

Q：
As we know, MAX is based on the traditional CPLD architecture with a global routing pool, while MAXII's routing resources are more like ones in a FPGA.
It is sait that MAXII has more flexible and abundant routing resources than MAX, but why? In an other word, Why is the routing architecture of MAXII more superior than the one of MAX?

A：
Traditional CPLD architecture adopt global routing resource. At higher densities, global routing resource die size increase exponentially with number of LABs, which resulting in a routing-dominated die. MAX II CPLD architecture is row&column routing. Routing increases linearly with number of LABs, resulting in efficient die size.

The MAX II architecture is comprised of an array of LABs consisting of LUT-based LEs, a bank of non-volatile flash memory, and JTAG control circuitry. The MultiTrack interconnect and local Fast I/O connection are designed to maximize performance and minimize power by using the most efficient, direct connection from input to logic to output. The architecture is pad-limited, making the die as small as possible for a given package, resulting in the low cost per I/O benefit.