原创那些年，我们拿下了FPGA（上）第3章-FPGA的应用领域

 2012-8-31 08:43  8560 15 16 分类: FPGA/CPLD 文集: 那些年，我们拿下了FPGA

第3章 FPGA的应用领域

我们学习一项技术的最开始就会有这样的问题，这项技术的可以来做什么？能够有多大的能耐？我们为什么要学？等等一系列很有求知欲的问题。为了让大家在正式学习FPGA技术之前明白自己将来可能在哪些地方找到自己的一片天空，书安排了这一节。当然这一节安排在第一章里，属于基础性的东西，基础的东西固然重要，否则就不是基础了。当然这一节读者还可以作为精神粮食，传说中FPGA的学习比较痛苦，人每每遇到了痛苦就会有种天生的逃的自然反应，各种惰性放弃的心就油然而生，与其花钱买那些充满传奇色彩的励志书籍来安慰自己还不如重新看看这一小节，看看自己以后的美好发展空间，于是乎会有种找到天堂般的感觉。

FPGA的最初也是传统的应用领域是通信领域，但是随着信息产业和微电子技术的发展，FPGA技术已经成为信息产业最热门的技术之一，应用范围遍及航空航天、汽车、医疗、广播、测试测量、消费电子、工业控制等热门领域，并随着工艺的进步和技术的发展，从各个角度开始渗透到生活当中。那么这一节我们将对这些行业应用分为四个方面叙述FPGA的用武之地，只有清楚了这些应用领域，对我们来讲才有更多的发展空间。这四个方面不分地位的排列成视频图像处理、通信领域、数字信号处理和其他领域，否者按照上面划分的领域进行分类的话，有点冗余，天堂描绘的太好，自然大家对这样的天堂会有很大的怀疑。个人觉得这样的分类自到恰处。当然介绍这些应用时，除了无形引用了些相关专门领域同行的专业而真实的发自内心的看法外，还为了追加这个美好天堂的真实性，概括了厂商提供的各领域的解决方案。

3.1视频图像处理中的应用

3.1.1 概述

视频图像处理至始至终都是多媒体领域最热门的技术，特别随着我们在不断追逐更高清更真实的欲望的膨胀，视频图像的处理数据量越来越大。基于这些大量的数据，我们又可以分为视频编解码和目标识别两大类。

3.1.2 视频编解码

视频编解码主要是从信道容量角度考虑的数据传输带宽，如何压缩图像，采用什么样的算法，这个已经做的比较成熟了。目前正在使用的视频编解码器要数的话可达数百种，但是针对我们最常用的还是其中少数的几种编解码器。列举出其中几种出来说明一下，第一种是比较老的但是仍然在用的MPEG-2,主要在广播信号和DVD电影的编码，，但是随着高清DVD采用的VC-1和H.264标准进行编码，MPEG-2码的使用也将逐渐推出历史舞台。第二种是MPEG-4，它相比MPEG-2能够以更低的速率但是形同的图像质量来传送视频。同时它引入了描述自然的或合成的对象等新概念来构成场景并支持与用户交互，给视频节目制作商定提供了改进的内容保护功能和创建更灵活、可复制内容的能力。这些优点，使得卫星视频的传送得到使用。第三种就是H.264，它其实是MPEG-4中的第十部分，主要以其高数据压缩率和质量走红，这里单独列了出来进行突出。还有一些JPEG算法等等，就不列举了，这里只是做个引导，大家如果“不小心”走上了这个行业应用的话，可以找找相应图像处理算法书籍补充。

3.1.3 目标识别

目标识别主要是用来提取相关信息，比如后面章节中提到的图像边缘提取，同时结合一些人工智能等方面的知识，相对来讲还是处在一个快速发展阶段，也是图像处理研究的前沿内容。

特别是移动目标检测与跟踪技术，在机器人视觉、交通检测、机器导航等民用领域有着广泛的应用，同时在火力拦截、**电视和红外视频制导等军用方面也发挥着重要作用。可识别的视频行为包括：突然入侵、移动物体、运动路径、遗留物体、指向接近、移走物体六大类检测。试想，动车上应该也有这个视频检测技术，车头应该有检测多少范围内前方是否有车，当然这肯定不是视野范围内的，采用雷达或者其他测试手段，但是肯定有视频图像传输与识别制导系统。原因在这不探讨，但是既然发生这样撞尾事件，我们视频检测制导还是很有我们需要提高的，去努力的方向。

有人会说，不是有专门的视频处理的DSP器件么，DSP书上说它做这个，FPGA也说做这个，到底是哪个做这个？似乎有自夸自的嫌疑。对传统上是采用DSP处理，只是我们列出的这些算法和应用对计算性能的要求已远远超出了传统DSP处理器的能力，即使采用高端的DSP处理器，如果将DSP单做这部分的话完全可以，只是在应用中，DSP做的事情比较多，这个时候，FPGA就可以用做协处理器来承担性能关键的处理工作。与标准DSP处理器相比，FPGA构造的并行计算特性可支持更高的采样速率和更大的数据吞吐能力，同时计算功效也更高。

3.1.4图像处理支持资源

（1）相关IP核。

Xilinx和ALTERA都提供了视频IP核组，以供视频监控系统中快速设计、仿真、实现和验证视频和图像处理算法，其中包括设计用的基本基元和高级算法。

表Xilinx ip 核

ip 核	描述
Color Correction Matrix	The Xilinx Color Correction Matrix LogiCORE can be used for color correction operations such as adjusting white balance, color cast, brightness, or contrast in an RGB image. The implementation is a 3x3 programmable coefficient matrix multiplier with offset compensation.
Color Filter Array Interpolation	The Xilinx LogiCORE Color Filter Array Interpolation Core reconstructs RGB data from color image sensors equipped with a Bayer Color Filter Array
Defective Pixel Correction	The Xilinx Defective Pixel Correction LogiCORE is a dynamic solution to remove defective pixels from a camera sensor array.
Gamma Correction	The Xilinx Gamma Correction LogiCORE provides customers with a fully tested and optimized hardware block for manipulating the values of a pixel. The input video data to be adjusted for specific output display devices by applying gamma curves to be applied to each color channel independently or as a single curve to all channels. This core supports a LUT table structure, or an interpolated LUT table structure that is programmed to transform the image data for the best image quality on the display
Image Characterization	The Xilinx Image Characterization LogiCORE calculates important statistical data for video input streams. Characterization is an important processing block for many applications including face recognition, object detection, and more. Statistics include means and variances for luminance, chrominance, high and low frequencies, edges and motion (When used with the Xilinx Motion Adaptive Noise Reduction LogiCORE) on both a global and block basis. Support for block sizes of 4x4, 8x8, 16x16, 32x32 or 64x64 pixels. Support for 8-bit pixel data in YUV 4:2:2 or 4:2:0, up to 1080p 30fps. The core is programmable through a comprehensive register interface for setting edge gains, high-pass gain, color selects (hue and saturation) and block size. The Image Characterization LogiCORE is provided with two different interfaces: General purpose processor and EDK pCore (including device driver)
Image Edge Enhancement	The Xilinx Edge Enhancement LogiCORE provides edge enhancement of each frame of video data being processed. The core provides a set of standard Sobel and Laplacian filters with programmable, edge adaptive gain settings to adjust the strength of the edge enhancement effect
Image Noise Reduction	The Xilinx Noise Reduction LogiCORE provides developers with an easy to use IP block for reducing noise within each frame of video. The core has a programmable, edge adaptive smoothing function to change the characteristics of the filtering in real-time
Image Statistics	The Xilinx Image Statistics LogiCORE collects statistical information for each video frame. This core generates a set of statistics for color histograms, mean and variance values, edge, and frequency content for 16 user defined zones on a per frame basis. The statistical information collected can be used in control loops for Auto-Focus, Auto-White Balance and Auto-Exposure applications.
Motion Adaptive Noise Reduction	The Xilinx Motion Adaptive Noise Reduction LogiCORE is an effective module for both motion detection and motion adaptive noise reduction in video streams. The core allows the motion detection function to be used independently of the noise reduction function for applications where noise reduction is not needed. The noise reduction algorithm is implemented as a recursive temporal filter with a user programmable transfer function allowing the user to control both the shape of the motion transfer and the strength of the noise reduction applied. The motion transfer function is initialized according to the settings in the Coregen GUI, but is also programmable at runtime via the register interface. The LogiCORE is provided with two different interfaces: General purpose processor and EDK Pcore (including device driver)
RGB to YCrCb Color-Space Converter	The Xilinx RGB to YCrCb Color Space Converter LogiCORE with built-in support for 5 formats and 3 range standards. The implementation is a simplified 3x3 constant coefficient matrix multiplier, which uses only 4 multipliers exploiting the inter-relations of RGB to YCrCb coefficients. The module is optimized to take advantage of multiply-add capabilities of DSP slices.
Video Direct Memory Access	The Xilinx Video DMA LogiCORE provides a flexible interface for controlling and synchronizing video frame stores from external memory. The VDMA works in conjunction with the Video Frame Buffer Controller (VFBC) and provides a read or a write interface to external memory. Multiple VDMAs from different clock domains can be linked together to control frame store reads and writes from multiple sources. Automatic frame skips and repeats are performed to seamlessly allow frame rate conversion. Support for up to 16 external frame stores with image sizes of 4k x 4k is provided. The core is programmable through a comprehensive register interface for setting and controlling frame synchronization (can be turned on/off in real-time), frame read/write delays, source synchronization switching, circular buffer enable and more using logic or a microprocessor. A comprehensive set of interrupt status bits provided for processor monitoring. The LogiCORE is provided with two different interfaces: General Purpose Processor and EDK pCore (including device driver).
Video On Screen Display	The Xilinx On-Screen Display LogiCORE provides a flexible video processing block for alpha blending and compositing as well as simple text and graphics generation. Support for up to eight layers using a combination of external video inputs (from frame buffer) and internal graphics controllers (including text generators) is provided. Supported image sizes up to 4kx4k with YUVa 4:4:4 or 4:2:2 and RGBa image formats up to 1080p 30fps. The core is programmable through a comprehensive register interface for setting and controlling screen size, background color, layer position, and more using logic or a microprocessor. A comprehensive set of interrupt status bits is provided for processor monitoring. The LogiCORE is provided with two different interfaces: General Purpose Processor and EDK Pcore (including device driver).
Video Scaler	The Xilinx Video Scaler LogicCORE is a sophisticated module for resizing video streams up or down and can be configured to support conversions across all SD and HD resolutions from 1080P to QCIF. The core is implemented as a polyphase filter that supports configurable vertical and horizontal tap settings from 2-12 with programmable coefficients. The user may select either a parameterizable EDK PCore, a General Purpose Processor (GPP) interface netlist or a Constant interface netlist. The GPP and PCore interfaces enable a microprocessor to load coefficient sets in real time and program other scaler parameters.
Video Timing Controller	The Xilinx Video Timing Controller LogiCORE(TM) is a general purpose video timing generator and detector. Automatic detection of horizontal and vertical front and back porches, sync pulses and active video pixels is provided along with sync and blank pulse polarity detection. Horizontal and vertical blanking and sync pulses are generated including support for programmable pulse polarity. The core is programmable through a comprehensive register set allowing control of various timing generation parameters including horizontal and vertical front and back porch start, active video start, sync start and more. A comprehensive set of interrupt status bits is provided for processor monitoring.
YCrCb to RGB Color-Space Converte	The Xilinx YCrCb to RGB Color Space Converter LogiCORE with built-in support for 4 video standards and 3 input ranges. The implementation is a simplified 3x3 constant coefficient matrix multiplier, which uses only 4 multipliers exploiting the inter-relations of color-space conversion coefficients. The module is optimized to take advantage of multiply-add capabilities of DSP slices.

表 altera ip核

Frame Reader	Reads video from external memory and outputs it as a stream.
Control Synchronizer	Synchronizes the changes made to the video stream in real time between two functions.
Switch	Allows video streams to be switched in real time.
Color Space Converter	Converts image data between a variety of different color spaces such as RGB to YCrCb.
Chroma Resampler	Changes the sampling rate of the chroma data for image frames, for example from 4:2:2 to 4:4:4 or 4:2:2 to 4:2:0.
2D FIR Filter	Implements a 3x3, 5x5, or 7x7 finite impulse response (FIR) filter on an image data stream to smooth or sharpen images.
Alpha Blending Mixer	Mixes and blends multiple image streams—useful for implementing text overlay and picture-in-picture mixing.
Scaler II	New HDL code-based Scaler II MegaCore function uses less area than first-generation Scaler in Video and Image Processing (VIP) Suite while delivering higher performance. The Scaler II function further reduces required resources with new support of 4:2:2 chroma data sampling rate. Both linear and polyphase algorithms are available in this VIP Suite release.
Scaler	A sophisticated polyphase scaler that allows custom scaling and real-time updates of both the image sizes and the scaling coefficients.
Deinterlacer II	Converts interlaced video formats to progressive video format using a motion adaptive deinterlacing algorithm. Also supports "bob" and "weave" algorithms, low-angle edge detection, 3:2 cadence detection and low latency.
Deinterlacer	Converts interlaced video formats to progressive video format using a motion adaptive deinterlacing algorithm. Also supports "bob" and "weave" algorithms
Test Pattern Generator	Generates a video stream that contains still color bars for use as a test pattern.
Clipper	Provides a way to clip video streams and can be configured at compile time or at run time.
Color Plane Sequencer	Changes how color plane samples are transmitted across the Avalon-ST interface. This function can be used to split and join video streams, giving control over the routing of color plane samples.
Frame Buffer	Buffers video frames into external RAM. This core supports double or triple-buffering with a range of options for frame dropping and repeating.
2D Median Filter	Provides a way to apply 3x3, 5x5, or 7x7 pixel median filters to video images.
Gamma Corrector	Allows video streams to be corrected for the physical properties of display devices.
Clocked Video Input/Output	These two cores convert the industry-standard clocked video format (BT-656) to Avalon-ST video and vice versa.

（2）设计工具。

Xilinx System Generator for DSP

Xilinx System Generator for DSP允许使用Xilinx视频IP模块组构建和调试Simulink中的高性能DVR系统。使用System Generator开发并实现视频处理算法，可以获得经过彻底验证和可以轻松执行的设计。 Xilinx已开发出各种经过预测试的新型视频IP模块组，用户可以在System Generator内拖放模块来轻松构建视频/影像系统，从而省下用HDL语言编写这些基本构建模块的宝贵时间。

为了处理从开发板到PC的庞大的视频数据流，System Generator for DSP引入了另一种新颖的高速硬件协同仿真(通过以太网接口)，实现低延迟的高流量，在System Generator环境中构建视频/影像系统极其有用。

另一种基于MATLAB语言的设计工具是Xilinx开发的AccelDSP综合工具，这是基于高级MATLAB语言的工具，用于为Xilinx FPGA设计DSP模块。此工具可实现浮点到定点的自动转换，能生成可综合的VHDL或Verilog语言，并且可以为验证创建测试平台。并且可以直接利用MATLAB算法生成定点C++模型或System Generator模块。AccelDSP是Xilinx XtremeDSP解决方案的一个关键组件，它集最先进的FPGA、设计工具、知识产权内核、合作伙伴关系于一体。

Altera DSP Builder

对于定制开发，Altera提供最佳的DSP设计流程，可以采用不同的方法进行设计，包括VHDL/Verilog、基于模型的设计和基于C语言的设计。Altera的视频和图像处理套件能够应用于这些设计流程中。Altera和The MathWorks合作开发了全面的DSP开发流程，使设计人员能够充分利用Altera的FPGA的价格/性能优势以及Simulink、The MathWorks基于模型的设计工具等。Altera的DSP Builder是一种DSP开发工具，它结合了Simulink和Altera业界领先的Quartus II开发软件。DSP Builder提供无缝设计流程，设计人员在MATLAB软件中进行算法开发，在Simulink软件中进行系统级设计，然后将设计导入至硬件描述语言 (HDL)文件，供Quartus II软件使用。DSP Builder工具和SOPC Builder工具紧密集成，使用户能够结合Simulink设计和Altera嵌入式处理器以及知识产权内核来构建系统。对于那些在可编程逻辑设计软件上经验还不够的设计人员而言，这种开发流程简单易用，非常直观。视频和图像处理套件。