接着上一章提及过的亚稳态,我相信,你们都知道亚稳态带来的危害了吧?
下面再用一个简单的例子说明一下:
input clk,
input rst_n,
output sys_rst_n
//------------------------------------------
reg rst_nr1, rst_nr2;
always @(posedge clk or negedge rst_n)
begin
if(!rst_n)
begin
rst_nr1 <= 1'b0;
rst_nr2 <= 1'b0;
end
else
begin
rst_nr1 <= 1'b1;
rst_nr2 <= rst_nr1;
end
end
assign sys_rst_n = rst_nr2;
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