教学实验<?xml:namespace prefix = o ns = "urn:schemas-microsoft-com:office:office" />

MSP430基础实验

msp430x261x_1.c - Software Toggle P1.0

msp430x261x_1_vlo.c - Software Toggle P1.0, MCLK = VLO/8

msp430x261x_adc12_01.c - ADC12, Sample A0, Set P1.0 if A0 > 0.5*AVcc

msp430x261x_adc12_02.c - ADC12, Using the Internal Reference

msp430x261x_adc12_03.c - ADC12, Sample A10 Temp, Set P1.0 if Temp ++ ~<?xml:namespace prefix = st1 ns = "urn:schemas-microsoft-com:office:smarttags" />2C

msp430x261x_adc12_04.c - ADC12, Extend Sampling Period with SHT Bits

msp430x261x_adc12_05.c - ADC12, Using an External Reference

msp430x261x_adc12_06.c - ADC12, Repeated Sequence of Conversions

msp430x261x_adc12_07.c - ADC12, Repeated Single Channel Conversions

msp430x261x_adc12_08.c - ADC12, Using 10 External Channels for Conversion

msp430x261x_adc12_09.c - ADC12, Sequence of Conversions (non-repeated)

msp430x261x_adc12_10.c - ADC12, Sample A10 Temp and Convert to oC and oF

msp430x261x_clks.c - Basic Clock, Output Buffered SMCLK, ACLK, and MCLK

msp430x261x_compA_01.c - Comparator A, Poll input CA0, result in P1.0

msp430x261x_compA_02.c - Comparator A, Poll input CA0, CA exchange, result in P1.0

msp430x261x_compA_04.c - Comparator A, Poll input CA0, result in P1.0

msp430x261x_compA_05.c - Comparator A, Input to CA0, interrupt triggered

msp430x261x_dac12_01.c - DAC12_0, Output 1.0V on DAC0

msp430x261x_dac12_02.c - DAC12_0, Output 2.0V on DAC1

msp430x261x_dac12_03.c- DAC12_0, Output Voltage Ramp on DAC0

msp430x261x_dc0_flashcal.c - DCO Calibration Constants Programmer

msp430x261x_dma_01_CCE.c - (Built with CCE) DMA0, Repeated Burst to-from RAM, Software Trigger

msp430x261x_dma_02_CCE.c - (Built with CCE) DMA0, Repeated Block to P1OUT, TACCR2 Trigger

msp430x261x_dma_03_CCE.c - (Built with CCE) DMA0, Repeated Block UCA1UART 9600, TACCR2, ACLK

msp430x261x_dma_04_CCE.c - (Built with CCE) DMA0, Block Mode UART1 9600, ACLK

msp430x261x_dma_05_CCE.c - (Built with CCE) DMA0, Repeated Blk to DAC0, Sine Output, TACCR1, DCO

msp430x261x_dma_06_CCE.c - (Built with CCE) DMA2, Rpt'd Blk to DAC1, 8-Bit Sine, TBCCR2, DCO

msp430x261x_dma_07_CCE.c - (Built with CCE) DMA0/1, Rpt'd Blk to DAC12_0/1, Sin/Cos, TACCR1, XT2

msp430x261x_dma_09_CCE.c - (Built with CCE) DMA0, ADC12 A10 Block Xfer to RAM, TBCCR1, DCO

msp430x261x_dma_10_CCE.c - (Built with CCE) DMA0, ADC12 A10 Block Xfer to Flash, TBCCR1, DCO

msp430x261x_dma_11_CCE.c - (Built with CCE) DMA0/1, ADC12 A10 Block Xfer to MPY/RAM, TBCCR1, DCO

msp430x261x_dma_12_CCE.c - (Built with CCE) DMA0/1, Block Mode UART1 9600 Auto RX/TX String, ACLK

msp430x261x_dma_01_IAR.c - (Built with IAR) DMA0, Repeated Burst to-from RAM, Software Trigger

msp430x261x_dma_02_IAR.c - (Built with IAR) DMA0, Repeated Block to P1OUT, TACCR2 Trigger

msp430x261x_dma_03_IAR.c - (Built with IAR) DMA0, Repeated Block UCA1UART 9600, TACCR2, ACLK

msp430x261x_dma_04_IAR.c - (Built with IAR) DMA0, Block Mode UART1 9600, ACLK

msp430x261x_dma_05_IAR.c - (Built with IAR) DMA0, Repeated Blk to DAC0, Sine Output, TACCR1, DCO

msp430x261x_dma_06_IAR.c - (Built with IAR) DMA2, Rpt'd Blk to DAC1, 8-Bit Sine, TBCCR2, DCO

msp430x261x_dma_07_IAR.c - (Built with IAR) DMA0/1, Rpt'd Blk to DAC12_0/1, Sin/Cos, TACCR1, XT2

msp430x261x_dma_09_IAR.c - (Built with IAR) DMA0, ADC12 A10 Block Xfer to RAM, TBCCR1, DCO

msp430x261x_dma_10_IAR.c - (Built with IAR) DMA0, ADC12 A10 Block Xfer to Flash, TBCCR1, DCO

msp430x261x_dma_11_IAR.c - (Built with IAR) DMA0/1, ADC12 A10 Block Xfer to MPY/RAM, TBCCR1, DCO

msp430x261x_dma_12_IAR.c - (Built with IAR) DMA0/1, Block Mode UART1 9600 Auto RX/TX String, ACLK

msp430x261x_flashwrite_01.c - Flash In-System Programming, Copy SegC to SegD

msp430x261x_flashwrite_03.c - Flash In-System Programming w/ EEI, Copy SegC to SegD

msp430x261x_flashwrite_04.c - Flash In-System Programming w/ EEI, Copy SegD to B&C

msp430x261x_fll_01.c - Basic Clock, Implement Auto RSEL SW FLL

msp430x261x_fll_02.c - Basic Clock, Implement Cont. SW FLL with Auto RSEL

msp430x261x_hfxt2.c - Basic Clock, MCLK Configured to Operate from XT2 HF XTAL

msp430x261x_hfxt2_nmi.c - Basic Clock, MCLK Sourced from HF XTAL XT2, NMI

msp430x261x_lpm3.c - Basic Clock, LPM3 Using WDT ISR, 32kHz ACLK

msp430x261x_lpm3_vlo.c - Basic Clock, LPM3 Using WDT ISR, VLO ACLK

msp430x261x_MPY_01.c - 16x16 Unsigned Multiply

msp430x261x_MPY_02.c - 8x8 Unsigned Multiply

msp430x261x_MPY_03.c - 16x16 Signed Multiply

msp430x261x_MPY_04.c - 8x8 Signed Multiply

msp430x261x_MPY_05.c - 16x16 Unsigned Multiply Accumulate

msp430x261x_MPY_06.c - 8x8 Unsigned Multiply Accumulate

msp430x261x_MPY_07.c - 16x16 Signed Multiply Accumulate

msp430x261x_MPY_08.c - 8x8 Signed Multiply Accumulate

msp430x261x_nmi.c - Configure RST/NMI as NMI

msp430x261x_OF_XT2.c - XT2 Oscillator Fault Detection

msp430x261x_P1_01.c - Software Poll P1.3, Set P1.0 if P1.3 = 1

msp430x261x_P1_02.c - Software Port Interrupt Service on P1.3 from LPM4

msp430x261x_P1_05.c - Write a byte to Port 1

msp430x261x_P7_05.c - Write a byte to Port 7

msp430x261x_P8_08.c - Write a byte to Port 8

msp430x261x_PA_05.c - Write a word to Port A

msp430x261x_rosc.c - DCOCLK Biased with External Resistor Rosc

msp430x261x_svs_01.c - SVS, POR @ 2.5V Vcc

msp430x261x_ta_01.c - Timer_A, Toggle P1.0, CCR0 Cont. Mode ISR, DCO SMCLK

msp430x261x_ta_02.c - Timer_A, Toggle P1.0, CCR0 Up Mode ISR, DCO SMCLK

msp430x261x_ta_03.c - Timer_A, Toggle P1.0, Overflow ISR, DCO SMCLK

msp430x261x_ta_04.c - Timer_A, Toggle P1.0, Overflow ISR, 32kHz ACLK

msp430x261x_ta_05.c - Timer_A, Toggle P1.0, CCR0 Up Mode ISR, 32kHz ACLK

msp430x261x_ta_08.c - Timer_A, Toggle P1.0,P1.2 & P2.0 Cont. Mode ISR, 32kHz ACLK

msp430x261x_ta_11.c - Timer_A, Toggle P1.1/TA0, Up Mode, 32kHz ACLK

msp430x261x_ta_13.c - Timer_A, Toggle P1.1/TA0, Up/Down Mode, DCO SMCLK

msp430x261x_ta_14.c - Timer_A, Toggle P1.1/TA0, Up/Down Mode, 32kHz ACLK

msp430x261x_ta_16.c - Timer_A, PWM TA1-2 Up Mode, DCO SMCLK

msp430x261x_ta_17.c - Timer_A, PWM TA1-2, Up Mode, 32kHz ACLK

msp430x261x_ta_19.c - Timer_A, PWM TA1-2, Up/Down Mode, DCO SMCLK

msp430x261x_ta_20.c - Timer_A, PWM TA1-2, Up/Down Mode, 32kHz ACLK

msp430x261x_tb_01.c - Timer_B, Toggle P1.0, CCR0 Cont. Mode ISR, DCO SMCLK

msp430x261x_tb_02.c - Timer_B, Toggle P1.0, CCR0 Up Mode ISR, DCO SMCLK

msp430x261x_tb_03.c - Timer_B, Toggle P1.0, Overflow ISR, DCO SMCLK

msp430x261x_tb_04.c - Timer_B, Toggle P1.0, Overflow ISR, 32kHz ACLK

msp430x261x_tb_05.c - Timer_B, Toggle P1.0, CCR0 Up Mode ISR, 32kHz ACLK

msp430x261x_tb_07.c - Timer_B, PWM TB1-6, Up Mode, 32kHz ACLK

msp430x261x_uscia0_irda_01.c - USCI_A0 IrDA External Loopback Test, 8MHz SMCLK

msp430x261x_uscia0_spi_09.c - USCI_A0, SPI 3-Wire Master Incremented Data

msp430x261x_uscia0_spi_10.c - USCI_A0, SPI 3-Wire Slave Data Echo

msp430x261x_uscia0_uart_01.c - UUSCI_A0, 115200 UART Echo ISR, DCO SMCLK

msp430x261x_uscia0_uart_03.c - USCI_A0, Ultra-Low Pwr UART 9600 Echo ISR, 32kHz ACLK

msp430x261x_uscia0_uart_04.c - UUSCI_A0, 9600 UART, SMCLK, LPM0, Echo with over-sampling

msp430x261x_uscia1_uart_02.c - USCI_A1, Ultra-Low Pwr UART 2400 Echo ISR, 32kHz ACLK

msp430x261x_uscib0_i2c_04.c - USCI_B0 I2C Master RX single bytes from MSP430 Slave

msp430x261x_uscib0_i2c_05.c - USCI_B0 I2C Slave TX single bytes to MSP430 Master

msp430x261x_uscib0_i2c_06.c - USCI_B0 I2C Master TX single bytes to MSP430 Slave

msp430x261x_uscib0_i2c_07.c - USCI_B0 I2C Slave RX single bytes from MSP430 Master

msp430x261x_uscib0_i2c_08.c - USCI_B0 I2C Master TX multiple bytes to MSP430 Slave

msp430x261x_uscib0_i2c_09.c - USCI_B0 I2C Slave RX multiple bytes from MSP430 Master

msp430x261x_uscib0_i2c_10.c - USCI_B0 I2C Master RX multiple bytes from MSP430 Slave

msp430x261x_uscib0_i2c_11.c - USCI_B0 I2C Slave TX multiple bytes to MSP430 Master

msp430x261x_uscib0_spi_09.c - USCI_B0, SPI 3-Wire Master Incremented Data

msp430x261x_uscib0_spi_10.c - USCI_B0, SPI 3-Wire Slave Data Echo

msp430x261x_vlo_capture.c - Basic Clock, VLO-Driven Timer with VLO Compensation

msp430x261x_wdt_01.c - WDT, Toggle P1.0, Interval Overflow ISR, DCO SMCLK

msp430x261x_wdt_02.c - WDT, Toggle P1.0, Interval Overflow ISR, 32kHz ACLK

msp430x261x_wdt_04.c - WDT+ Failsafe Clock, WDT mode, DCO SMCLK

msp430x261x_wdt_05.c - Reset on Invalid Address fetch, Toggle P1.0

msp430x261x_wdt_06.c - WDT+ Failsafe Clock, 32kHz ACLK

CC2520基础实验

“hello” “Hello world” example. This application writes the CC2520 Chip ID and

version number to the serial port.

“reg_read” This application reads the value of all registers in CC2520 and writes their

values to the serial port.

“light_switch” Wireless light/switch application. One node is configured as a light controller,

and the other node as a wireless light switch.

“PER_test” Packet Error Rate test application.

“rf_modem” This application functions as an example of a RF modem for secure wireless

file transfer. The file transfer is protected by CCM* authentication and

encryption.

“ccm_security” This example application shows how to use the CCM* functionality in

CC2520 to generate an authenticated and encrypted packet. The same test

vectors as in the IEEE Std. 802.15.4-2006 specification section 2.3 are used

in this example.

TIMAC实验

TIMAC - IEEE802.15.4 Medium Access Control (MAC) Software Stack

·                             Support for IEEE 802.15.4-2003

·                             Multiple Platforms

·                             Easy Application Development

·                             Easy Porting

ZIGBEE基础实验

·                             GenericApp: A simple proprietary application example to get you started

·                             SampleApp: A simple proprietary application example to get you started

·                             TransmitApp: A packet throughput test application

·                             SETestApp: A demonstration of the ZigBee Smart Energy Profile

·                             SampleLight / SampleSwitch: A demonstration of Home Automation devices

Support for ZigBee-2007 (ZigBee PRO):

·                             ZigBee-2007 certified stack including both ZigBee and ZigBee PRO feature sets

·                             Easy Application Development and Tool Support

·                             Support for ZigBee Smart Energy and Home Automation profiles

·                             Simple API to make development easy

·                             Standard profile and proprietary sample application code

·                             Over the Air Download (OAD) support

Zigbee 2007基础实验：

了解Zigbee 2007的使用方法，学习在Zigbee2007中利用OSAL建立和使用任务，通过任务的方式调用网络层API，完成数据在网络中的通讯，在整个实验中会设计到组通讯、广播通讯和接收数据处理等Zigbee关键技术。

Zigbee Pro基础实验：

了解Zigbee Pro的使用方法，学习在Zigbee Pro中利用串口和Zigbee实现两台计算机之间的远程数据传输。

Zigbee Pro进阶实验1：

通过ZigBee联盟规定的家庭自动化（HomeAutomation）模式实现家庭智能化演示。

Zigbee Pro进阶实验2：

通过ZigBee联盟推出的AMI 应用剖面进行的节能应用实验，让我们更加深入的认识ZigBeePro的独特优势。

WSN实验

从硬件的设计，到软件的实现，最后通过上位机PC软件监控界面来全面监控整个基于最新ZigBeePro协议的传感器网络。对之前所学进行一次全面总结，也为我们学习ZigBee协议画上一个圆满的句号。