tag 标签: can

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  • 热度 2
    2019-9-11 14:21
    1227 次阅读|
    1 个评论
    TJA1043简介
    一:基本信息 · TJA1043 是一个 CAN 收发器,位于 CAN 控制器和 BUS 之间。 · 支持 CAN FD 。在 CAN FD 模式下,速率可达 5Mbit/s 。 · 支持 12V 和 24V 系统。 · 两种封装。 SO14 和 HVSON14 。 二: Pin定义 · VCC: 给 Transimt 供电。电压范围 4.5~5.5V 。 · VIO: 给 I/O 口供电。电压 2.8~5.5V 。此 Pin 需要和 MCU 共用电源。这样 TXD,RXD,STB_N,EN,ERR_N 会和 MCU 有同样的逻辑电平。 · Vbat :直接连接在电池上。当整个系统都处于休眠状态,只有 CAN 内部一小部分活着。为了下一次的 wake up 。 Vbat 就是在此种状态下, CAN 中仍旧活着的那一小部分供电。 · GND · TXD: 这是一根信号输入 pin 。 · RXD: 这是一根信号输出 pin 。 · CANH/L: BUS 信号 · EN :使能输入 pin · INH :输出 pin 。控制 DUT 上电源模块使能 。 · ERR_N :输出 pin 。作为 Error 或者 power on 指示 pin , active 电压是 L 。 · WAKE :本地唤醒输入 pin 。 此 pin 是输入 pin 。它即可以侦测信号从 H 到 L 的变化,也可以侦测信号从 L 到 H 的变化。当侦测到有电平转换,即意味着 CAN 要被唤醒。 为了更好的 EMI 性能,建议此 pin 连接到 VBAT 或者 GND 。 · STB_N : Standby 输入 pin , active 电压是 L 。 · SPLIT :共模稳定输出 pin。 此 pin 连接到分离电阻终端网络,可以稳定 BUS 上的隐性电压。通过一个 DC 泄漏到 GND ,可以降低 EME (电磁辐射)。 在 Normal 和 Listen only mode ,此 pin 输出一个 0.5VCC 的直流电压。在其他三种模式下,它是 floating 的 。 三:电源相关 1. 操作电压 VCC=4.5~5. 5V VIO=2.8~5.5V 2. 耗电 (1) 针对 VCC 正常工作时,耗电最大值是 65mA 处于 Listen only 时,耗电最大 9mA 。 Standby 或者 sleep 状态时,耗电最大 2uA 。 (2) 针对 VIO 工作时,耗电最大 500uA Standby 或者休眠模式时,耗电最大 4uA 。 四:工作模式 1043 有 5 种工作模式。通过 STB_N 和 EN 去设置这些工作模式。 1. Normal mode 在此模式下, 1043 通过 CANH 和 CANL 接收或者发送数据。接收到的模拟差分信号,会被转换成数字信号通过 RXD 输出。 BUS pin 上有偏置电压,其值是 0.5VCC ,即 2.5V 。原因是 1043 的 Ri 造成。 Ri 是 1043 的输入阻抗。 1043 的单端输入阻抗是 9Kohm , 15Kohm , 28Kohm 。其差分阻抗是 19Kohm , 30Kohm , 52Kohm 。 INH 一直是 H 。即相关的电源都是打开的。 2. Listen only mode 在此模式下, 1043 的输出功能是 disable 的。仅仅只有接收功能。仍旧会将 CAN BUS 上的数据通过 RXD 输出到 MCU 。 仍旧还有 0.5VCC 的偏置, INH 也还是 H 。 3.Standby mode 这是一种省电模式。 1043 既不输出数据,也不接收数据。 1043 的 low power receiver 被激活去监控 bus 。 BUS 的偏置位于 GND level 。 INH 仍旧为 H ,即有其控制的相关电源仍旧打开着。 RXD 和 ERR_N 将映射出任何的 wake up 需求。需要提供 VIO 和 VBAT 。 4. Go to sleep mode 此模式是进入 sleep mode 的一个过渡阶段。在此模式下, 1043 的行为像 standby 模式,同时有 go to sleep 命令被传输到 1043. 在进入完全 sleep mode 之前, 1043 将处于 go to sleep mode 若干时间,此时间称为 Th ( min ),即 the Minimum hold time 。 在此时间之前,如果 STB_N 或者 EN 改变,或者 wake flag 被设置,则 1043 不会进入 go to sleep mode 。 5. Sleep mode 需要通过 go to sleep mode 进入 sleep mode ,并且在相关电压( VCC 活 VIO )恢复之前,侦测到 VCC or VIO 处于欠压已经一段时间了。 在此模式下, 1043 行为和 standby 一致,只是 INH 被设置为 floating 。所有 INH 控制的电源都处于 off 状态。进入 Vbat 的电流将被减低到最小。 通过 STB_N , EN 和 wake flag 可以将 node 唤醒从 sleep mode 。 五:2种wake up方式 1. Local wakeup 当 wake pin 有电平变化,并且新的电平持续时间大于 Twake 时,local wakeup被侦测到。 2. Remove wake up * 1043 在 standby or sleep 模式下,可以通过侦测 CAN BUS 上一组特殊的 wake up pattern ,唤醒自己。 * 这个测试 pattern 在 ISO11898-5:2007 中有定义。 * 有 滤波器 可以帮忙滤除假的 wake up pattern 。这些假的 pattern 是由于 BUS 上的噪声和毛刺引起的。 * 测试 Pattern 有三部分组成: · 一份显性信号,至少持续 Twake ( busdom ) · 一份隐性信号,至少持续 Twake ( busrec ) · 一份显性信号,至少持续 Twake ( busdom ) · 无论显性信号,还是隐性信号,只要时间短于上面的时间需求,都会被忽略。 * 完整的三段信号必须在 Tto ( wake ) bus 时间之内被接收并且识别。否则内部的 wake up 逻辑会被复位。接收到的完整的 wake up pattern 将会触发 wake up 事件。注意: RXD pin 一直保持高,直到 wake up 事件被触发,才会变 L 。 六:Local failures 1043 能侦测到 4 中 local failure 情况,同时会设置 local failures flag 。而且大多数情况下, 1043 的输出会被 disable 。 1. TXD dominant 超时 由于 HW 或者 SW 应用出错,导致在 TXD pin 上出现永久的 L level ,这将驱动 CAN BUS 进入永久的显性阶段,锁住整个网络通信。 TXD dominant time out 功能就是:当 TXD 保持 L 电平超过 Tto(dom)TXD 时,去 disable 发射机 ,阻止网络被锁。发射机会持续 disable ,直到 local failure flag 被清除。 2. TXD to RXD 短路侦测 当 RXD pin 和 TXD pin 之间短路时,一旦 bus 被驱动为显性,整个 bus 都会被锁在永久的显性状态。 原因是 RXD 的低边驱动能力一般都强于 TXD 的高边驱动能力。 当出现此种短路时,发射机会被 disable 。直到 local failure flag 被清除。 3.Bus 显性超时 当 CAN BUS 短路到 VBAT 、 VCC 或者 GND ,或者网络上其他节点出现 fail ,都会导致一个差分电压出现在 BUS 上,进而导致 BUS 处于显性状态。 当 BUS 处于显性状态,会导致任何一个 node 不能开始传输。一般的 BUS failure detection 不能侦测到这种失败,但是 bus dominant clamping (固定住) detection 可以侦测到此种失败。 当 BUS 处于显性状态超过 Tto ( dom ) bus , local failure flag 会被设置。通过检测此 flag ,控制器可以确定是否有一个钳位 bus 将网络通信锁住。不需要去 disable 发射机。 注意: local failure flag 不能保持此种 bus 显性 clamping failure ,同时会尽快让 BUS 回到隐性阶段。 4. 过温测试 当结温变的很大, 1043 将 shut down 去保护 输出设备 。 1043 将一直处于 disable 状态,直到此 local failure flag 被清除。 ------------------------------------------------------------------------------ 转载请说明出处。
  • 热度 5
    2016-4-18 20:10
    967 次阅读|
    4 个评论
    一、 常见 CAN 收发器 TJA1042 的数据手册 TJA1042 datasheet中Block框图描述了收发器的内部结构:          Datasheet中还有关于split管脚的内部模型:          Datasheet的描述很简陋,但是可以用来构建简单的CAN收发器电路模型。 二、 CAN 收发器电路模型(仅用于简单的 DC 分析) 估计把下面的模型放出来,能把IC工程师气得吐血,乃至生活不能自理。 在此,向节假日依然奋战在IC工业的广大工程师指战员们表示慰问!下面的内容,如 此简单粗暴地简化你们复杂而伟大的工作,仅仅是为了DC分析某项小问题,不代表CAN收发器内部结构可以这样简单,     简单的内部结构如下:       使用Cadence公司PSpice仿真软件,可以得到CANH/CANL波形的仿真结果:          有了以上工作的基础,可以进行其它诸如总线CANH断线时波形分析等等问题的分析,免去计算等,可以直观地观察波形。   参考资料: TJA1042,Product data sheet,Rev. 7 — 8 May 2012 PSpice V16-5-13c
  • 2013-10-3 18:30
    599 次阅读|
    0 个评论
    Do we now need a solution better than JTAG? Hard real-time control software is increasingly common in terms of the number of different items in everyday life that use it. Many items that offer better safety, with equivalent or better energy efficiency, are now possible. But most of the people I know who have recently purchased a new piece of electronics, or a vehicle, or some other device have found at least one bug! It is becoming increasingly clear that, without help, JTAG-based ICE (in-circuit emulation) is not up to par on many of today's CPUs. Furthermore, JTAG testing and debugging does not allow one to test all the "at speed problems" one encounters in research and development or in production. This is forcing JTAG test escapes to be found by other means. The CAN bus (for controller area network) came out around the same time as JTAG, and both took time to gain momentum. This was when embedded Flash memory sizes were only a few hundred kilobytes in size. By comparison, modern automobiles and control systems use real-time stacks on 100mbp/sec Ethernet, and 1GHz (or higher) processors with many gigabytes of Flash memory, but they often still use only JTAG for debugging, Flash Loading (often only the boot loader), and partial production test. It is left for each chip maker and OS/OEM to come up with a full Flash load/debug solution on its own. Be it an MCU, an FPGA, or some other device, many are limited in one way or another by limitations in JTAG technology. Isn't it time we come up with a readily affordable, industry-wide solution? The thing is that bad debug and test capability can have a very real human cost. Allow me to relate a story that will illustrate my point... Back in the 90s I worked for an aerospace company designing police, fire, medevac, and special mission radios for helicopters and aircraft. We had one Intel ICE for the 8051. The ICE used the old "Bond Out" chip ICE technology. I was not there when the original code was developed and they first attempted to use this ICE. It was bad enough that we were out in a lab in the middle of the desert with a bad ICE. When we were not dealing with scorpions, poisonous centipedes, black widows, or the occasional side-winder that would craw into our lab (or up through the shower drain in the middle of getting ready for work) we had to find other, less venomous, but equally vexing, "bugs" by the time- honoured tradition of "Burn and Learn." What this meant was that we would "burn" a UV erasable version of the processor and then "learn" whether or not it would then burn out the transmitter. Dealing with ever-so-great equipment and angry customers that could fly in at any minute to lodge a complaint was never dull. It was also interesting having to handle walking, crawling poisonous bugs while we were frantically wrestling our own black widow's nest of a C compiler riddled with bugs coupled with a bad ICE. The ICE was so complicated to set up and get working—and the power in the lab went out so often—that it was damn near impossible to get it all running right before we lost power along with the working configuration. It was a race against time reminiscent of a "Dr. Who" episode. This was in the days of DOS, and there was no such thing as an uninterruptable power supply (UPS) for a PC and ICE, let alone a Flash memory in which to save the ICE configuration. This system had actually been designed to use a VT-100 terminal as the interface! Sadly, it had been made for a large corporation that could have easily afforded a plant-wide UPS. Furthermore, the company executives had all been fined for billing all kinds of executive perks to the government, so there was no money for a better ICE when one finally came out. William Murray Electrical Engineer
  • 2013-10-3 18:27
    566 次阅读|
    0 个评论
    Is a solution better than JTAG now necessary? Hard real-time control software is increasingly common in terms of the number of different items in everyday life that use it. Many items that offer better safety, with equivalent or better energy efficiency, are now possible. But most of the people I know who have recently purchased a new piece of electronics, or a vehicle, or some other device have found at least one bug! It is becoming increasingly clear that, without help, JTAG-based ICE (in-circuit emulation) is not up to par on many of today's CPUs. Furthermore, JTAG testing and debugging does not allow one to test all the "at speed problems" one encounters in research and development or in production. This is forcing JTAG test escapes to be found by other means. The CAN bus (for controller area network) came out around the same time as JTAG, and both took time to gain momentum. This was when embedded Flash memory sizes were only a few hundred kilobytes in size. By comparison, modern automobiles and control systems use real-time stacks on 100mbp/sec Ethernet, and 1GHz (or higher) processors with many gigabytes of Flash memory, but they often still use only JTAG for debugging, Flash Loading (often only the boot loader), and partial production test. It is left for each chip maker and OS/OEM to come up with a full Flash load/debug solution on its own. Be it an MCU, an FPGA, or some other device, many are limited in one way or another by limitations in JTAG technology. Isn't it time we come up with a readily affordable, industry-wide solution? The thing is that bad debug and test capability can have a very real human cost. Allow me to relate a story that will illustrate my point... Back in the 90s I worked for an aerospace company designing police, fire, medevac, and special mission radios for helicopters and aircraft. We had one Intel ICE for the 8051. The ICE used the old "Bond Out" chip ICE technology. I was not there when the original code was developed and they first attempted to use this ICE. It was bad enough that we were out in a lab in the middle of the desert with a bad ICE. When we were not dealing with scorpions, poisonous centipedes, black widows, or the occasional side-winder that would craw into our lab (or up through the shower drain in the middle of getting ready for work) we had to find other, less venomous, but equally vexing, "bugs" by the time- honoured tradition of "Burn and Learn." What this meant was that we would "burn" a UV erasable version of the processor and then "learn" whether or not it would then burn out the transmitter. Dealing with ever-so-great equipment and angry customers that could fly in at any minute to lodge a complaint was never dull. It was also interesting having to handle walking, crawling poisonous bugs while we were frantically wrestling our own black widow's nest of a C compiler riddled with bugs coupled with a bad ICE. The ICE was so complicated to set up and get working—and the power in the lab went out so often—that it was damn near impossible to get it all running right before we lost power along with the working configuration. It was a race against time reminiscent of a "Dr. Who" episode. This was in the days of DOS, and there was no such thing as an uninterruptable power supply (UPS) for a PC and ICE, let alone a Flash memory in which to save the ICE configuration. This system had actually been designed to use a VT-100 terminal as the interface! Sadly, it had been made for a large corporation that could have easily afforded a plant-wide UPS. Furthermore, the company executives had all been fined for billing all kinds of executive perks to the government, so there was no money for a better ICE when one finally came out. William Murray Electrical Engineer  
  • 热度 3
    2012-6-8 21:00
    2325 次阅读|
    2 个评论
    。简介        随着汽车工业的发展,汽车已经成为当今社会的主要交通工具,汽车电子化、网络化、智能化也促使汽车零部件越来越多、构造越来越复杂,作为减少硬联机主要技术的汽车总线系统也越来越被广泛使用和认可。         BLC1006为汽车总线模拟系统,是汽车总线产品开发的必备利器。能为开发汽车总线产品的技术人员提供很高的参考价值,大大减少开发难度及周期,也能为汽车专业广大院生及个人爱好者提供参考,加深理解及领会汽车总线系统。BLC1006支持目前主流的汽车总线系统,包括ISO规定的ISO9141、ISO14230、ISO11898、ISO15765及美国SAE J1850协议。 。主要功能 支持ISO9141协议 支持ISO14230快速初始化协议 支持ISO14230 5波特率初始化协议 支持ISO15765 CAN250K标准协议 支持ISO15765 CAN250K扩展协议 支持ISO15765 CAN500K标准协议 支持ISO15765 CAN500K扩展协议 支持SAE J1850 PWM协议 支持SAE J1850 VPW协议 支持EUC四种工作模式:NORMAL、CALIBRATION、LISTEN、AUTO         …… 。ECU 工作模式介绍 NORMAL MODE:在这种模式,所有OBD产品请求的PID模拟量数据可以通过手动调节FR1~FR6获取,PID与FR1~FR6的映射关系参考附录A       ……      MAF曲线图:      …… 串口监控:     ……  FREEZE FRAME:      安装说明           类似于安装在汽车上即插即用,可直接将特开发的OBD产品连接到BLC1006的OBD母插座 可开发产品举例 OBD2 汽车检测仪 OBD2 诊断仪 OBB2 通用油耗仪 智能行车电脑 GPS 导航行车电脑  ……         (如有需要请联系,加入QQ请注明所在公司)          联系人:袁生          Mobile:13613076578          QQ:573143979 E_MAIL:veni_gps@163.com   下面是本店连接: http://item.taobao.com/item.htm?id=17540164883_u=kqdtr7m8f59
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    CAN总线在汽车电子领域的应用广泛,掌握对CAN总线的知识,对深入研究开发汽车电子产品有着推波助澜的作用,有这方面需求的网友,不防下载一下,学习学习!
  • 所需E币: 10
    时间: 2019-5-16 16:23
    大小: 13.11MB
    上传者: 2iot
    【通俗易懂】从电路到电磁场.docxBUCKBOOST电路原理分析.docxCAN总线接口电路设计注意事项.docxDC-DC升压电路.docxFPGACPLD数字电路设计经验分享.docxMIC电路工作总结.docxMOS管驱动电路详解.docxPCB电路设计指南(经典).docxPLC输出电路(继电器,晶体管,晶闸管输出)区别和注意事项.docxRCC电路详解.docxRC电路(积分电路,微分电路).docxRC正弦波振荡电路.docxUSB电池充电电路.docxWiFi产品的一般射频电路设计.docx并联、串联谐振电路的特性.docx常用运算放大器电路(全集).docx串行通信口防雷电路设计参考.docx单片机各种复位电路原理.docx电感在电路中的作用与使用方法!.docx电路常识(2)-电容.docx电路常识(1)-输入、输出阻抗.docx电路的一些基本概念.docx电路级静电防护技巧.docx电路可靠性设计与元器件选型.docx电路设计(二):串联匹配电阻的应用.docx电路设计(九):三极管的应用.docx电路设计(六):稳压二极管的应用.docx电路设计(三):0欧姆电阻、磁珠、电感的应用.docx电路设计(四):电容的应用.docx电路设计(五):电感的应用.docx电路设计(一):上拉电阻与下拉电阻的应用.docx电路设计的14个误区,你注意了吗?.docx电路设计小窍门:提高PCB设备可靠性的技术措施.docx电路设计中的电阻与电压问题.docx电路设计中的模拟地与数字地.docx电路设计中应该注意的几个问题.docx电路是计算出来的.docx电路为什么要有触发器这种结构?.docx电路中7个常用接口类型的要点说明.docx电路中极点与零点的产生与影响(论坛整理).docx电容在电路中各种作用的基本常识.docx电子电路设计的一些技巧和注意事项.docx对电路中高输入阻抗和低输出阻抗的个人理解.docx放大电路负反馈的原理特点.docx分析RF电路设计中的常见问题.docx分压电路容易忽略的小错误.docx复位电路无小事.docx工程师必须掌握的20个模拟电路.docx工程师离不开的那些电路设计工具.docx关于DCDC转换器电路设计的技巧.docx关于模拟电路的理解.docx合集1.zip合集2.zip合集3.zip合集4.zip几种分析电路的常用方法.docx加法器(减法器)运算放大电路.docx经典运放电路分析(经典).docx经验之谈,工程师在电路设计中的八大误区.docx晶振电路原理介绍.docx开关电源电路组成及各部分详解.docx拉氏变换与电路设计计算.docx脉冲电路的用途和特点.docx模拟电路和数字电路PCB设计的区别.docx模拟电路和数字电路的学习笔记(精华总结55条).docx模拟电路基础问答题总结.docx模拟电路设计的九个级别.docx那些年我们一起认识的RC反馈回路.docx那些值得电子工程师珍藏的经典模拟电路.docx嵌入式系统硬件电路设计时需要考虑的基本问题.docx如何看懂数字逻辑电路.docx三大前辈教你怎样学好模拟电路.docx设计驱动继电器电路的注意事项.docx射频电路的设计原理及应用.docx射频电路的原理及应用.docx深入了解电路噪声的那些事.docx什么是ESD(静电放电)及ESD保护电路的设计.docx数模混合电路设计的难点.docx说一说三极管放大电路设计的那些技巧.docx谈电路设计的几个误区.docx通俗讲解电子电路.docx学电路设计过程中的那些趣事,被当时的自己蠢哭了....docx一个经典输出短路保护电路.docx一些硬件电路技术经验整理.docx硬件电路设计流程系列--原理图设计.docx硬件工程师电路设计十大要点.docx振荡电路的用途和振荡条件.docx总结模拟电路设计经验12条.docx
  • 所需E币: 3
    时间: 2019-6-8 22:31
    大小: 670.37KB
    上传者: royalark_912907664
    对于当前社会信息化技术发展的前提下,基于CAN总线技术,分析设计车载故障诊断系统的需求,并基于SAEJ1939协议,从系统需求分析、总体结构、功能设计、CAN总线设计、硬件、软件代码设计方面优化设计实现车载故障诊断系统。结果证实,基于CAN设计车载故障诊断系统,可以提升系统在诊断车载故障时的准确率,提升34.0%,可以在线完成对车辆故障的诊断工作,发挥积极应用性能。结论表明,基于CAN技术设计实现车载故障诊断系统,满足实际应用需求,发挥积极设计实现效益,可以在实践中推广该系统设计方案。
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