标签: tsmc

Much analysis and detective work have been devoted to understanding what Intel's dabbling in the foundry business means. However, trying to read those tea leaves is a fool's errand. We do not yet know how involved Intel will eventually become in the foundry market. And neither does Intel. Like my colleagues, I do not believe that Intel is poised to jump whole hog into the foundry business, competing with the likes of TSMC, UMC and Globalfoundries. The world's biggest chip vendor has in recent years dipped its toe in the foundry waters through deals with companies like Achronix, Tabula and Netronome. These firms are small, requiring production volumes that don't amount to a hill of beans compared to the mountain of Intel chips produced each day. But we've also been told that Intel's three publicly disclosed foundry customers are just the tip of the iceberg. Intel is also working as a foundry for several other companies, including some large chip vendors. We can at this point only guess at who these companies are. We also can only guess at how much Intel is charging its foundry customers for wafers. Customers, of course, bristle at the thought of discussing anything so uncouth. But it would seem a fair conclusion that Intel is charging a hefty premium, working for a set of customers (at least the publicly disclosed ones) that have everything to gain from access to Intel's unquestioned lead in process technology. For the time being, Intel's strategy appears to be to work only with those customers who benefit so much from the leading-edge process technology that they are willing to pay dearly for it. But that could change in the future. Mark Bohr, an Intel Senior Fellow who is the firm's process technology guru, told EE Times recently that Intel doesn't want to be in the general foundry business, competing against the likes of TSMC, UMC and Globalfoundries. But, at the same time, Bohr cast aspersions on the fabless-foundry model as is, claiming that the announcement that TSMC will offer only one flavour of 20-nm process technology means that Qualcomm and the like won't be able to use it. (Bohr's opinion is debatable, and neither Qualcomm nor TSMC have said anything of the sort). In a conference call with analysts following Intel's quarterly report earlier last month, Intel President and CEO Paul Otellini was fairly non-committal about the company's dabbling in foundry, describing it largely as a learning experience (albeit one that generates profit). But Otellini also said, on the subject of Intel's long term aspirations in the foundry market, "I'll leave that point open." Later, Otellini discussed the "theoretical" possibility of Intel landing a heavyweight such as Apple or Qualcomm as a foundry customer. Leaving the point open is precisely the right call. Because nobody knows yet where Intel is prepared to take this. It doesn't make sense at this point for Intel to hang its hat on foundry work to generate a sizable portion of its revenue. But Intel may yet one day decide that building wafers for other firms is easy money and set aside a larger portion of its total capacity dedicated for the purpose. The problem for Intel—or any firm that does foundry work but also builds its own products—is what happens when business is booming. When the market heats up and Intel can sell its parts faster than it can make them, will foundry customers be pushed to the back of the line? At the moment, with the small volumes required by Intel's publicly announced foundry customers, that would seem to be a non issue. But throw a customer or two the size of Qualcomm or Apple into the mix and the situation changes dramatically. Ultimately, this might prove to be the key question in how big a foundry player Intel wants to be. Because once Intel decides to sign some customers of significant size, the company has to be committed to supporting them, even at the expense of cutting into sales of its own chips. This may well prove to be a bridge further than Intel is willing to go. But there is no need for the company to make that decision now. For now, Intel gains knowledge, experience and profit while at the same time stirring the pot by being a nuisance to some of its competitors as well as the pure play foundries. How far will it go? The point remains open.

Recently, there has been much analysis and detective work dedicated to unraveling what Intel's dabbling in the foundry business means. But trying to read those tea leaves is a fool's errand. We do not yet know how involved Intel will eventually become in the foundry market. And neither does Intel. Like my colleagues, I do not believe that Intel is poised to jump whole hog into the foundry business, competing with the likes of TSMC, UMC and Globalfoundries. The world's biggest chip vendor has in recent years dipped its toe in the foundry waters through deals with companies like Achronix, Tabula and Netronome. These firms are small, requiring production volumes that don't amount to a hill of beans compared to the mountain of Intel chips produced each day. But we've also been told that Intel's three publicly disclosed foundry customers are just the tip of the iceberg. Intel is also working as a foundry for several other companies, including some large chip vendors. We can at this point only guess at who these companies are. We also can only guess at how much Intel is charging its foundry customers for wafers. Customers, of course, bristle at the thought of discussing anything so uncouth. But it would seem a fair conclusion that Intel is charging a hefty premium, working for a set of customers (at least the publicly disclosed ones) that have everything to gain from access to Intel's unquestioned lead in process technology. For the time being, Intel's strategy appears to be to work only with those customers who benefit so much from the leading-edge process technology that they are willing to pay dearly for it. But that could change in the future. Mark Bohr, an Intel Senior Fellow who is the firm's process technology guru, told EE Times recently that Intel doesn't want to be in the general foundry business, competing against the likes of TSMC, UMC and Globalfoundries. But, at the same time, Bohr cast aspersions on the fabless-foundry model as is, claiming that the announcement that TSMC will offer only one flavor of 20-nm process technology means that Qualcomm and the like won't be able to use it. (Bohr's opinion is debatable, and neither Qualcomm nor TSMC have said anything of the sort). In a conference call with analysts following Intel's quarterly report earlier last month, Intel President and CEO Paul Otellini was fairly non-committal about the company's dabbling in foundry, describing it largely as a learning experience (albeit one that generates profit). But Otellini also said, on the subject of Intel's long term aspirations in the foundry market, "I'll leave that point open." Later, Otellini discussed the "theoretical" possibility of Intel landing a heavyweight such as Apple or Qualcomm as a foundry customer. Leaving the point open is precisely the right call. Because nobody knows yet where Intel is prepared to take this. It doesn't make sense at this point for Intel to hang its hat on foundry work to generate a sizable portion of its revenue. But Intel may yet one day decide that building wafers for other firms is easy money and set aside a larger portion of its total capacity dedicated for the purpose. The problem for Intel—or any firm that does foundry work but also builds its own products—is what happens when business is booming. When the market heats up and Intel can sell its parts faster than it can make them, will foundry customers be pushed to the back of the line? At the moment, with the small volumes required by Intel's publicly announced foundry customers, that would seem to be a non issue. But throw a customer or two the size of Qualcomm or Apple into the mix and the situation changes dramatically. Ultimately, this might prove to be the key question in how big a foundry player Intel wants to be. Because once Intel decides to sign some customers of significant size, the company has to be committed to supporting them, even at the expense of cutting into sales of its own chips. This may well prove to be a bridge further than Intel is willing to go. But there is no need for the company to make that decision now. For now, Intel gains knowledge, experience and profit while at the same time stirring the pot by being a nuisance to some of its competitors as well as the pure play foundries. How far will it go? The point remains open.  

Earlier this month, things seemed bleak for Globalfoundries when it announced an amended wafer supply agreement with its top customer and former parent company, AMD. The upshot was that AMD was willing pay Globalfoundries $425 million and give up its remaining stake in its former manufacturing unit in exchange for the right to have 28-nm accelerated processing units (APUs) built by another foundry (presumably TSMC). It didn't sound good. Yes, we set out our headline as "AMD ditches Globalfoundries." But in retrospect that seems like a gross oversimplification of a rather complicated arrangement. Globalfoundries has always had a long term goal of achieving complete independence from AMD. But the company couldn't have wanted it to happen like this. Globalfoundries can't be thrilled about waiving the provision of its deal with AMD that called for Globalfoundries to build its 28-nm APUs exclusively. Still, any conclusion that the amended deal spelled the end of the road for the two companies' business relationship was apparently way off base. For starters, AMD actually plans to spend more on wafers with Globalfoundries this year than it did last year (about $1.5 billion, compared to about $900 million in 2011). AMD CFO Thomas Seifert said AMD plans to have 28-nm APUs built at both TSMC and Globalfoundries. AMD executives also appear to be going out of their way to emphasize that the relationship between the two companies has actually strengthened considerably since last summer, when 32-nm yield issues at Globalfoundries hurt AMD's sales. The latest example of this neighborly vibe came Wednesday (March 21), when Globalfoundries issued an announcement stating that has shipped a quarter million wafers based on its 32-nm high-k metal gate (HKMG) technology. Globalfoundries can't claim a lot of technical advantages over TSMC, but as the announcement states the 250,000 shipped HKMG wafers represents a significant lead over other foundries in HKMG manufacturing. The statement also includes a quote from AMD CEO Rory Read stating that the HKMG milestone is a "testament" to the progress that the two companies have made together. "In just one quarter, we were able to see more than a doubling of yields on 32-nm, allowing us to exit 2011 having exceeded our 32-nm product shipment requirements," Read said. "Based on this successful ramp of 32-nm HKMG, we are committed to moving ahead on 28-nm with Globalfoundries." In the same statement, Globalfoundries CEO Ajit Manocha referenced problems with early yield learning on 32-nm HKMG, but said several organization and operational changes (presumably including his own appointment as CEO) led to dramatic improvement in production velocity and yield on 32-nm HKMG. "And since our 28-nm technology uses the same HKMG implementation as 32-nm, AMD and other customers will benefit greatly from our high-volume ramp of leading-edge APUs at 32-nm." So it would seem that, despite the amended wafer supply agreement, Globalfoundries and AMD remain close.  

What's not to love about a storyline that matches off semiconductor process technology leaders Intel Corp. and Taiwan Semiconductor Manufacturing Co. (TSMC) against one another in a race to achieve some high-level technical goal? Last week, a report by the Taiwan External Trade Development Council (TAITRA), a nonprofit organization promoting trade with Taiwanese firms, did just that, issuing a report that tantalizingly suggested that TSMC might beat Intel to the punch in bringing "three-dimensional chips" to market. EE Times and other news organizations quickly seized on the report and published stories based on it. The problem, as many EE Times readers promptly pointed out, is that the report was deeply flawed and based upon a false equivalency. While Intel is preparing to later this year bring to market chips with 3-D transistors (known as tri-gate transistors by Intel), TSMC and others have been working to develop 3-D technology based on through-silicon vias (TSVs), vertical connections that pass through die to connect different layers of a chip within the same package. While the language of the TAITRA report was not totally clear, a minimal amount of investigation quickly revealed that the report was comparing apples to oranges, setting up a "race" between Intel's delivery of tri-gate devices with TSMC's offering of chips with TSVs. The only thing that these technologies have in common, essentially, is that they are both technologies that can be described as 3-D, one of the most popular buzzwords in technology these days. The race between Intel and TSMC imagined by the TAITRA report is not unlike musing about competition between swimmer Michael Phelps and sprinter Usain Bolt at the upcoming 2012 Olympics: two world-class competitors gunning for high-level achievements in completely different sports. The TAITRA report cited an anonymous source within TSMC saying that TSMC's schedule for 3-D chip rollout matched that of Intel, which has said it expects its tri-gate devices to be ready for volume production by the end of the year. The report did not get into the specifics of the TSMC 3-D technology, instead using language similar to that which Intel used during the tri-gate launch in May to describe 3-D chips in general. TSMC is developing its own 3-D transistor technology, known as FinFET, which is similar to Intel's tri-gates. But TSMC said as recently as February that it does not expect to put FinFET devices into production until 2015 or 2016. In other words, it's highly unlikely that TAITRA's anonymous TSMC source was referring to TSMC's FinFET technology being in volume production by the end of this year (which would have made it more of an apples to apples comparison). TSMC has not provided an official production schedule for its TSV technology. In April, TSMC did not provide an update for its TSV roadmap at its annual technology symposium, as the foundry giant has done in the past. TSMC was low key about TSVs this year and said TSV development was "still in the early stages." Nevertheless, it's far more likely that TAITRA's anonymous source was referring to TSV devices being in production by the end of the year than FinFETs. The TAITRA report quoted Shang-Yi Chiang, senior vice president for RD at TSMC, saying the company has been working closely with packaging and design software providers to commercialize the technology. Intel, by the way, is also developing 3-D chip stacking through TSVs, as are a host of other semiconductor firms, including Samsung Electronics Co. Ltd., Elpida Memory Inc., IBM Corp., Toshiba Corp. and chip packaging provider Advanced Semiconductor Engineering Inc., among others. It's not yet known when any of these companies plan to put chips with TSVs into production. Last summer, at the International Interconnect Technology Conference, several experts agreed that the technology was some ways away from commercialization. To sum up: TAITRA circulated a deeply flawed report that falsely equivocated two completely different technologies that have only one thing in common, the fact that they are both described as 3-D technology. Let's assume that this was an honest mistake by TAITRA, based on a fundamental lack of understanding of the technologies. (TAITRA's press agents did not immediately respond to a request for an interview about the creation of the report). It was a mistake by EE Times (specifically, sloppy journalism by yours truly) to lend credence to the TAITRA report by publishing a story based on it. A good portion of our coverage is based on relevant reports produced by third parties. But journalistic standards demand that we kick the tires of these reports and assess their credibility, and in this case that was not done adequately.     Dylan McGrath EE Times

10月30日，电积电（TSMC）公布了今年第三季度财报，并预测第四季度产能将下调25%，主要原因是由于系统厂商与IC厂商第四季度都将面临巨大的库存压力。“所有客户都在下调第四季度库存，他们现在都是非常谨慎地下第四季度的订单。”台积电执行长蔡力行在当日招开的法说会上对所有记者与分析师表示。 虽然台积电下调产能的消息已有传闻，但是今日法说会上，听到其宣布这个消息，还是令很多人都更加担忧。“通过评估系统厂商的出货量预期，我们认为明年全球半导体市场将有5-10%的下降。”蔡力行接着表示：“但是，由于晶圆代工厂是处于上游，因此库存压力对我们的影响是放大性的，即库存对晶圆代工厂的影响大于对IC公司的影响。”从第四季的预测来看，考虑到季节性消费的因素，需求下降最多的将是PC，接下来是通信，需求下降最小的是消费电子产品。 但是，蔡力行表示台积电正在进行各种准备以面对金融风暴的袭?。2009年台积电的资本输出将下降20%，同时将会通过提升产能效率、进行成熟工艺的研发来推动业务的发展。比如说，将目前在12寸晶圆上已成功采用的GigaFab模式应用到8寸晶圆的生产线上，提升产能效率，降低成本；而在成熟工艺的研发方面，将会针对不同的应用开发细分的工艺，更合适地满足用户的需求。 不过，虽然面临比2001年半导体产业低迷时更大的全球金融风暴，但是蔡力行认为，经过这几年的供应链学习与管理，以及库存管理经验的积累，他们比以前能更好地管理库存问题了。“2001年我们的产能利用率仅有40%多，我们相信明年的情况比2001年会好很多。”蔡力行说道。 他特别指出，台积电在新技术的研发与产能投入上不会下降。他解释：“越是在低迷时间，越是要重视新技术与新产品的开发。新的技术将会更多的使用者。”因此，虽然台积电预测明年的产能会有超过20%的下调，但是65nm与45nm的产能不会下降。“我们还将会通过结构调整来保证我们有足够的能力继续投资新技术与产能。”他预计，明年的大部分支出都将用于45nm/40nm的工艺以及相关产能扩充。 在最新一代工艺方面，台积电的28nm工艺已有4-5家客户在式用，最先使用的芯片将是一些逻辑IC。同时，明年台积电还将加速22nm工艺的研发。 据台积电公司数据显示，按全球的晶圆片出货量计算，台积电晶圆片的消耗量占全球总数量的7.5%，但是这是包括了CPU以及内存的数量。如果除去这部分耗用量，台积电在通信与消费电子IC市场的影响力巨大。随着全球主流的IC公司从IDM向轻制造或无晶圆厂商转向，台积电承担了比以前任何时间都更重大的产能风险，他如何挺过去，是业界所有人都关注的问题。虽然台积电的ASP在下降，但是蔡力行表示，“我们决不打价格战，那是commodity产品才会做的事情。”他表态道：“我们会让价格的下降幅度小于成本的下降幅度，我们会在成本下降方面做非常大的努力。” 刚刚公布的第三季度业绩显示，台积电合并营收约达930亿新台币，税后纯益约为306亿新台币，同比分别增长4.5%与0.7%。其中，90nm工艺的营收占全季晶圆销售的26%，而 65nm工艺的营收已达以25%。全季毛利率仍达46.3%，高于大部分IC公司的毛利率。 孙昌旭