原创 READ

A comprehensive approach to design network-on-chip architectures for SOC/multicore systems.

Automated generation of round-robin arbitration and crossbar switch logic.

An adaptive chip multiprocessor cache hierarchy.

Memory and control organizations of stream processors.  MEMORY  STANFORD

7.19处理器,交叉开关

基于双端口RAM的数据Cache的研究与实现  交叉开关

基于高性能VIM体系结构的嵌入式存储系统的研究与实现