原创 AT91SAM9261 JTAGSEL and TEST pin & Shutdown/Wakeup

2008-10-9 18:20 6429 8 8 分类: MCU/ 嵌入式

JTAGSEL : 如果直接连接到 V33,  JLink ARM 不能识别.


开路, 或者短接到 VSS, 可以识别和调试.


JTAGSEL



In harsh environments,  It is strongly recommended to tie this pin to GNDBU
if not used or to add an external low-value resistor (such as 1 kOhm).



Internal pull-down resistor to GNDBU (15 kOhm).
Must be tied to VVDDBU to enter JTAG Boundary Scan. (此时不能通过jlink调试)


TEST 通过 1K 电阻或者直接短接到 VSS 均可.


TST In harsh environments,  It is strongly  recommended to tie this pin to GNDBU
if not used or to add an external low-value resistor (such as 1 kOhm)



Internal pull-down resistor to GNDBU (15 kOhm).


 


Note .


In a well-shielded environment subject to low magnetic and electric field interference, the pins = (JTAGSEL and TEST) may be left unconnected.


In noisy environments, a connection to ground is recommended.


Shutdown/Wakeup Logic


SHDN



Application dependent. A typical application connects the pin SHDN to the shutdown input of the DC/DC Converter providing the main power supplies. This pin is a push-pull output.
SHDN pin is driven low to GNDBU by the Shutdown Controller (SHDWC).



WKUP


0V to VVDDBU. This pin is an input-only.



WKUP behavior can be configured through the Shutdown Controller (SHDWC).


BMS Application dependent.


Internal pull-up resistor to VVDDIOP (100 kOhm).



Must be tied to VVDDIOP to boot on Embedded ROM.



Must be tied to GND to boot on external memory (EBI Chip Select 0). (通过下拉电阻 1K to GND)


 

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