原创 8路彩灯控制器

2010-4-15 23:46 2867 1 1 分类: FPGA/CPLD

8路彩灯控制器    


设计一个8路彩灯控制器,要求实现如下花样:
1)从左到右逐个亮,从右到左逐个灭;
2)从两边往中间逐个亮,从中间往两边逐个灭;
3)重复上面12<?xml:namespace prefix = o ns = "urn:schemas-microsoft-com:office:office" />


文本文件:




module caideng(clk,light,res);


input clk,res;


output[7:0] light;


reg[4:0] state;


reg[7:0] light;


parameter


FIRST=8'd0,


A=8'd1,  B=8'd2,


C=8'd3,  D=8'd4,


E=8'd5,  F=8'd6,


G=8'd7,  H=8'd8,


I=8'd9,  J=8'd10,


K=8'd11, L="8"'d12,


M=8'd13, N="8"'d14,


O=8'd15, P="8"'d16,


Q=8'd17, R="8"'d18,


S=8'd19, T="8"'d20,


U=8'd21, V="8"'d22,


W=8'd23, X="8"'d24;


                                  


always @(posedge clk)


begin


if(!res)


       begin


       state=FIRST;


       end


else


       casex(state)


       FIRST:state<=A;


       A:begin


              light=8'b10000000;


              state<=B;


         end


       B:begin


              light=8'b11000000;


              state<=C;


         end


       C:begin


              light=8'b11100000;


              state<=D;


         end


       D:begin


              light=8'b11110000;


              state<=E;


         end


       E:begin


              light=8'b11111000;


              state<=F;


         end


       F:begin


              light=8'b11111100;


              state<=G;


         end


       G:begin


              light=8'b11111110;


              state<=H;


         end


       H:begin


              light=8'b11111111;


              state<=I;


         end


       I:begin


              light=8'b11111110;


              state<=J;


         end


       J:begin


              light=8'b11111100;


              state<=K;


         end


       K:begin


              light=8'b11111000;


              state<=L;


         end


       L:begin


              light=8'b11110000;


              state<=M;


         end


       M:begin


              light=8'b11100000;


              state<=N;


         end


       N:begin


              light=8'b11000000;


              state<=O;


         end


       O:begin


              light=8'b10000000;


              state<=P;


         end


       P:begin


              light=8'b00000000;


              state<=Q;


         end


       Q:begin


              light=8'b10000001;


              state<=R;


         end


       R:begin


              light=8'b11000011;


              state<=S;


         end


       S:begin


              light=8'b11100111;


              state<=T;


         end


       T:begin


              light=8'b11111111;


              state<=U;


         end


       U:begin


              light=8'b11100111;


              state<=V;


         end


       V:begin


              light=8'b11000011;


              state<=W;


          end


       W:begin


              light=8'b10000001;


              state<=X;


         end


       X:begin


              light=8'b00000000;


              state<=A;


         end


       default:state=FIRST;


       endcase


       end


endmodule

 

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