原创 Query on building a CMOS buffer

I think I may have "over-indulged" several days ago whilst watching the Super Bowl. I was certainly "relaxed and refreshed and feeling no pain," as it were.

The problem is that things all seem to be a little "fluffy" around the edges the morning after. I'm finding it a tad difficult to get my brain to go into gear – it's like trying to fire-up a car that doesn't want to start – you keep on turning the key and the engine sort of splutters into life – and then it judders to a graunching halt again.

This might explain why I'm having so much difficulty wrapping my brain around a question that came winging its way across the Internet to me that day. But first, let's set the scene. In Chapter 6 of my book Bebop to the Boolean Boogie: An Unconventional Guide to Electronics (still the only electronics book in the world to include a Seafood Gumbo recipe) we consider how to construct primitive logic gates using CMOS technology (PMOS and NMOS transistors connected together in a complementary manner).

We start off with a simple inverter function in the form of a NOT (or INV) gate as shown below. If input 'a' is presented with a logic 0 (for example, if we used a wire to connect it to the VSS line), then NMOS transistor Tr2 will be turned Off, PMOS transistor Tr1 will be turned On, and output 'y' will be connected to VDD (logic 1) via Tr1.

Similarly, if input 'a' is presented with a logic 1 (for example, if we used a wire to connect it to the VDD line), then PMOS transistor Tr1 will be turned Off, NMOS transistor Tr2 will be turned On, and output 'y' will be connected to VSS (logic 0) via Tr2.

I then go on to explain that a non-inverting BUF (buffer) gate is more complex than a NOT gate. This is due to the fact that a BUF gate is essentially constructed from two NOT gates connected in series as shown below:

So far, so good. But now we move to consider the email I received, which reads as follows:

Respected sir,

I read your book "Bebop to the Boolean Boogie" and found it really amazing. The matter has been presented in a very friendly tone and easy to understand style. It really helped me to thoroughly understand the concepts.

But, I would like to bring into your consideration a small mistake from the book. In the chapter 'Using Transistors to Build Primitive Logic Functions' it is written that for building a CMOS Buffer, four transistors are required. But i think, interchanging the positions of the NMOS and PMOS transistors in the NOT circuit (given in the book) can give a Buffer and this technique uses only two transistors. Please find an image file attached with this email with a circuit diagram.

Am I right? Or is there a flaw in the above technique? Except for this, I found the book very good and I will surely recommend it to my peers.

Thank you sir for your consideration.

Well, you have to admit that he writes a very nice message. So there I am sitting looking at his suggested circuit. I can absolutely see where he's coming from. At the same time, I know this won't work, because I know you can't connect the PMOS and NMOS transistors together in this way. The problem is that – as I mentioned above – my poor old brain is limping along at a fraction of its usual speed, and I find myself unable to articulate why this won't work.

What say you? How can we put this into words that he (and I) will understand?