soc encounterSOC 42 FLOW SHOW SOC ENCOUNTER 42 1．Start ENCOUNTER Command, […@….]$ encounter 2. Desing Import Load the Verilog netlist(.v), physical libraries(.lef), process technology libraries, timing libraries(.lib), timing constraints(.sdc), CeltIC libraries(.cdb), GDS libraries (.gds), and Power, IPO, IO informations. Form, DesingDesign Import… 第 1 页 共 9 页 SOC 42 FLOW SHOW 3. FloorPlan Changing the core, IO, or die size. Form, Floorplan Specify Floorplan 第 2 页 共 9 页 SOC 42 FLOW SHOW 第 3 页 共 9 页 SOC 42 FLOW SHOW 4. PowerPlan Form , Floorplan -> Global Net Connections Form, Floorplan -> Automatic Power Planning -> Edit Template After “Instantiate…” 第 4 页 共 9 页 SOC 42 FLOW SHOW 第 5 页 共 9 页 SOC 42 FLOW SHOW Form, Route -> SRoute Verifying connectivity and geometry: Form, Form, ……