AsyncClkDesignSynthesis and Scripting Techniques for Designing MultiAsynchronous Clock Designs SNUG-2001 San Jose, CA Voted Best Paper 3rd Place Clifford E. Cummings Sunburst Design, Inc. ABSTRACT Designing a pure, one-clock synchronous design is a luxury that few ASIC designers will ever know. Most of the ASICs that are ever designed are driven by multiple asynchronous clocks and require special data, control-signal and verification handling to insure the timely completion of a robust working design. 1.0 Introduction Most college courses teach engineering students prescribed techniques for designing completely synchronous (single clock) logic. In the real ASIC design world, there are very few single clock designs. This paper will detail some of the hardware design, timing analysis, synthesis and s……