资料
  • 资料
  • 专题
ADV202_input_tiling
推荐星级:
类别: 消费电子
时间:2020-01-15
大小:32.74KB
阅读数:238
上传用户:givh79_163.com
查看他发布的资源
下载次数
0
所需E币
4
ebi
新用户注册即送 300 E币
更多E币赚取方法,请查看
close
资料介绍
ADV202_input_tiling_rev0ANALOG DEVICES TN-0003 TECHNICAL NOTE One Technology Way P.O. Box 9106 Norwood, MA 02062-9106 781/329-4700 World Wide Web Site: http://www.analog.com Recommended HD Architectures using 4 ADV202 Chips OVERVIEW This document provides a recommended architectures for implementing HD JPEG2000 Capture/Playback systems that require 4 ADV202 chips in order to achieve the highest possible level of performance. For each of these architectures, it is assumed that the Luminance and Chrominance pixel interfaces are separate 10-bit buses (or 8bit buses), and each is sampled at 74.25 MHz. Thus, the chip conguration can be illustrated as such: FIGURE 1. Diagram of 4-chip ADV202 Conguration ADV202 LUM1 Must connect common HSYNC, VSYNC, Pixel HOST and FIELD (HVF) to all 4 chips. Interface Interface ……
版权说明:本资料由用户提供并上传,仅用于学习交流;若内容存在侵权,请进行举报,或 联系我们 删除。
相关评论 (下载后评价送E币 我要评论)
没有更多评论了
  • 可能感兴趣
  • 关注本资料的网友还下载了
  • 技术白皮书