循环冗余校验计算一个TMS320C54x实现方案 Application Report SPRA519 Nested Loop Optimization on the TMS320C6x Richard Scales Digital Signal Processing Solutions Abstract This document descibes the process used to develop and optimize nested loops for the Texas Instruments (TI) TMS320C6x digital signal processor (DSP). The performance of loops can greatly affect the performance of entire applications. Many loops are nested loops with both an inner and outer loop. To optimize nested loops it is necessary to consider both the inner loop and the outer loop performance, especially when the inner loop count is small for execution of each outer loop. Design Problem In many typical DSP applications, loops comprise a majority of the number of cycles, or MIPS. Because of this, performance of loops can greatly affect the performance of t……