【应用笔记】莱迪思(Lattice)半导体用户的Altera设计流程(Altera Design Flow for Lattice Semiconductor Users) 如今的CPLD设计要求一个简单、却高效的设计环境来缩短设计的上市时间。 Today’s CPLD designs require a simple, but effective design environment to decrease the designs’ time to market. The design environment must contain an integrated suite of tools that allows you to take your CPLD design from conception to implementation. Numerous CPLD design environments address these requirements, but this document explains the functions of the Quartus® II software developed by Altera® Corporation, and the ispLEVER software developed by Lattice Semiconductor. This application note compares the design suite contained in both software packages, and how each addresses the CPLD design requirements. Altera Design Flow for Lattice Semiconductor Users January 2005, AN 345-1.1 Application Note Introduction Today’s CPLD designs require a simple, but effective design environment to decrease the designs’ time to market. The design environment must contain an integrated suite of tools that allows you to take your CPLD design from conception to implementation. Numerous CPLD design environments address these requirements, but this document explains the functions of the Quartus II softwar……