Kluwer Digital Computer Arithmetic Datapath Design Using Verilog HDLDigital Computer Arithmetic Datapath Design Using Verilog HDL DIGITAL COMPUTER ARITHMETIC DATAPATH DESIGN JAMES E. STINE Kluwer Academic Publishers Boston/Dordrecht/London Contents Preface ix 1. MOTIVATION 1 1.1 Why Use Verilog HDL? 1 1.2 What this book is not : Main Objective 2 1.3 Datapath Design 3 2. VERILOG AT THE RTL LEVEL 7 2.1 Abstraction 7 2.2 Naming Methodology 10 2.2.1 Gate Instances 11 2.2.2 Nets 12 2.2.3 Registers 12 2.……