DDR2+SPD+Revision+1Preliminary publication of JEDEC Semiconductor Memory Standard This Standard was developed by JEDEC Committee JC-45 and approved by the JEDEC Board of Directors. It is published here in preliminary form, prior to being integrated into JESD21C, Release 14, and then published in final form. Title of Standard: DDR2 SPD Revision 1.1 Council Ballot Number: JCB-04-005 Committee Ballot Numbers: 42.5-03-170, -230 -246, -247 Committee Item Numbers: 1489.02, 1542.01, 1468, 1502.03, 1489.03, 1392.03 Date of Council Approval: February 2004 Background: This proposal was balloted as JC-42.5-03-247 on November 11, 2003 and expired on December 3, 2003. The voting results were reported at the December 2003 JC-42 Committee meeting at which time the ballot was approved for Board of Directors submittal. This ……