FeaturesSelf-documenting reference methodology scripts for top-down synthesisSupports both wireload mode and topographical mode using the same set of scriptsDFT Compiler and Power Compiler reference methodologies are includedMultivoltage synthesis script also provided in Z-2007.03-SP1 versionDesigned to work with the IC Compiler Reference Methodology as the next stepIncluded README file provides complete usage informationDescriptionThe Design Compiler Reference Methodology (DC-RM) provides you with a set of reference scripts that serve as a recommended guideline for developing synthesis scripts. These scripts are not designed to run in their current form. They should be used as a reference and adapted for use in your design environment. A common set of scripts is provided that can be used to run both Design Compiler wireload mode and topographical mode. This also allows you to easily migrate your existing Design Compiler wireload-based synthesis to a topographical mode synthesis. The script is designed to detect when Design Compiler is being run in topographical mode (with the -topographical_mode option) and additional steps relating to topographical synthesis are automatically executed. The DC-RM also includes options for running DFT Compiler (including DFT MAX Adaptive Scan compression) and Power Compiler optimization. Please note that additional ******s are required when running DFT Compiler and Power Compiler within Design Compiler. The sections of the script relating to the use of DFT Compiler and Power Compiler are clearly marked to enable you to easily include or exclude these sections when preparing your synthesis scripts. The DC-RM includes the following scripts: common_setup.tcl - Common design setup variables for Design Compiler and IC Compiler Reference Methodologiesdc_setup.tcl - Library setup for DC-RMdc_scripts/dc.tcl - DC-RM script for top-down synthesis in DC or DCT.dc_scripts/dc_MV.tcl - DC-RM script for top-down Multi-Voltage synthesis in DC or DCT.……