The PIC24H data width is 16 bits. All internal registers and data space memory are organized as
16 bits wide. The data space can be accessed as one 64-Kbyte linear address range (for
microcontroller (MCU) instructions). The data spaces is accessed using two Address Generation
Units (AGUs) for read and write operations.
Figure 3-1 is an example of a data space memory map.
Data memory addresses between 0x0000 and 0x07FF are reserved for the device special
function registers (SFRs). The SFRs include cont rol and status bits for the CPU and peripherals
on the device.
MCU instructions can use any W register as an address pointer for a data read or write operation.
In addition, some PIC24H devices contain DMA and dual-ported SRAM memory (DPSRAM).
Both the CPU and DMA controller can write and read to/from addresses within the DPSRAM
without interference, such as CPU stalls, resulting in maximized, real-time performance. For
more information, refer to Section 22. “DMA” . Section 3. Data Memory
HIGHLIGHTS
This section of the manual contains the following topics:
3.1 Introduction .................................................................................................................... 3-2
3.2 Data Space Address Generator Unit (AGU) .................................................................. 3-5
3.3 DMA RAM ...................................................................................................................... 3-7
3.4 Related Application Notes.............................................................................................. 3-8
……
