【应用笔记】在Stratix III器件中实现片上终端(on-chip termination,OCT)校正(Implementing OCT Calibration in Stratix III Devices)
时间:2019-12-24
大小:623.28KB
阅读数:351
查看他发布的资源
资料介绍
【应用笔记】在Stratix III器件中实现片上终端(on-chip termination,OCT)校正(Implementing OCT Calibration in Stratix III Devices)
片上终端(on-chip termination,OCT)方案在Stratix III器件中的使用,消除了外部串行或并行终端电阻的需要,简化了PCB设计。Stratix III器件在所有I/O块上对单端I/O标准,支持可校准的片上串行、并行和动态终端。
eliminates the need for external series or parallel termination resistors
and simplifies the design of a PCB. Stratix III devices support calibrated
on-chip series, parallel and dynamic termination in all I/O banks for
single-ended I/O standards. OCT calibration allows you to establish an
optimal termination value that compensates impedance change due to
temperature and voltage fluctuation. You can enable Stratix III devices
calibration by user-controlled signals during device operation or by
default during device configuration. Implementing OCT
Calibration in Stratix III
Devices
October 2007, version 1.0 Application Note 465
Introduction Use of the on-chip termination (OCT) scheme in Stratix III devices
eliminates the need for external series or parallel termination resistors
and simplifies the design of a PCB. Stratix III devices support calibrated
on-chip series, parallel and dynamic termination in all I/O banks for
single-ended……
版权说明:本资料由用户提供并上传,仅用于学习交流;若内容存在侵权,请进行举报,或
联系我们 删除。