【应用手册】Implementing CRCCs in Altera Devices
Redundant encoding is a method of error detection that spreads the
information across more bits than the original data. The more redundant
bits you use, the greater the chance that you will detect transmission
errors. For example, a 16-bit increase in data record length misses 1 error
in 65,536, while a 32-bit increase misses only 1 error in over 4 billion.
Although these odds are favorable, undetectable errors can still occur.
The nature of common errors varies depending on the transmission and
storage medium, but undetectable errors can be caused by occasional
isolated-changed bits or short bursts of multiple-changed bits. To
minimize undetectable errors, you can distribute the data so that it is less
likely that transmission errors result in a valid encoding of an alternate set
of data.
Cyclic redundancy codes (CRCs) are a favored type of redundant
encoding. Cyclic redundancy code checkers (CRCCs) check for
differences between transmitted data and the original data. Data
transmission applications use CRCCs extensively. For example, the
Asynchronous Transfer Mode (ATM) specification requires a CRCC that
is implemented across the entire payload to ensure data integrity. Implementing CRCCs
in Altera Devices
October 2005 ver.2.1 Application Note 049
Introduction Redundant encoding is a method of error detection that spreads the
information across more bits than the original data. The more redundant
bits you use, the greater the chance that you will detect transmission
errors. For example, a 16-bit increase in data record length misses 1 error
in 65,536, while a 32-bit increase misses only 1 error in over 4 billion.
Although these odds are favorable, u……
