【应用手册】AN 550: Using the DLL Phase Offset Feature in Stratix FPGAs and HardCopy ASICs This application note describeshowto implement the delay-locked loop (DLL) phase offset feature with Altera® Stratix® FPGAs and HardCopy® ASICs. AN 550: Using the DLL Phase Offset Feature in Stratix FPGAs and HardCopy ASICs March 2010 AN-550-2.0 This application note describes how to implement the delay-locked loop (DLL) phase offset feature with Altera Stratix FPGAs and HardCopy ASICs. Introduction A DLL provides a process, voltage, and temperature (PVT)-compensated delay that you can use to phase shift the read clock from an external……