Xilinx CPLD 的上电性能 Application Note: CPLD R Power On Behavior of Xilinx CPLDs XAPP440 (v1.0) May 25, 2006 Introduction Why Programmable Logic is Different during Power On Applying power to a standard logic chip, SRAM, or EPROM, usually results in output pins tracking the applied voltage as it rises. Programmable logic attempts to emulate that behavior, but physics forbids perfect emulation, due to the device programmability. It requires care to ……