PowerQUICC and QorIQ DDR3 SDRAM Controller Register Setting Considerations
时间:2019-12-24
大小:199.83KB
阅读数:272
查看他发布的资源
资料介绍
PowerQUICC and QorIQ DDR3 SDRAM Controller Register Setting ConsiderationsFreescale Semiconductor Document Number: AN4039
Application Note Rev. 3, 01/2012
PowerQUICC and QorIQ
DDR3 SDRAM Controller Register
Setting Considerations
by Freescale Semiconductor, Inc.
Austin, TX
This application note expands on the description of the Contents
1. Configuration guidelines . . . . . . . . . . . . . . . . . . . . . . . 2
double data rate (DDR3) memory controller programmable 2. Register definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
registers in the PowerQUICC and QorIQ processor reference 3. Revisi……
版权说明:本资料由用户提供并上传,仅用于学习交流;若内容存在侵权,请进行举报,或
联系我们 删除。