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PCI Bus Architecture
Q1 What is PCI? What are the typical applications of a PCI bus?
Q2 Who governs the PCI Specification?
Q3 What level of participation does Altera have in developing PCI
standards?
Q4 What does the designer need to know about PCI to design with our IP
core?
Q5 What is the bandwidth of PCI?
Q6 What signal levels does PCI support?
Q7 What is a “North Bridge and a South Bridge”?
Q8 My customer is asking for Medium Decode. What is this and do we support
it?
Q9 How does latency affect PCI designs? What factors create the trade off
for low latency? What is our latency in the PCI cores?
Q10 What is the local side design?
Q11 What is “CompactPCI”?
Q12 What is “CardBus?”
Q13 What is “PMC?”
Obtaining the PCI Core
Q14 How does a customer get our PCI cores?
Q15……
