原创 三星 ARM CortexA9 开发板

Samsung Exynos 4210 ARM CortexA9 dual core SoC EVM board

Exynos 4210 is a system-on-a-chip (SoC) based on the 32-bit RISC processor for smartphones, tablet PCs, and Netbook markets. Exynos 4210 provides the best performance features such as dual core CPU, highest memory bandwidth, world's first native triple display, 1080p video decode and encode hardware, 3D graphics hardware, and high-speed interfaces such as SATA and USB.
Exynos 4210 uses the CortexA9 dual core, which is 25% DMIPS faster than the CortexA8 core. It provides 6.4GB/s memory bandwidth for heavy traffic operations such as 1080p video en/decoding, 3D graphics display, and native triple display. The application processor supports dynamic virtual address mapping. This feature will help the software engineers to fully utilize the memory resources with ease.
Exynos 4210 provides the best 3D graphics performance and native triple display. The native triple display, in particular, supports WSVGA resolution of two main LCD displays and 1080p HDTV display throughout HDMI, simultaneously. This is possible due to the capability of Exynos 4210 to support separate post processing pipelines.
Exynos 4210 lowers the Bill of Materials (BOM) by integrating the following IPs: world's first DDR3 interfaces that will prepare bit cross with DDR2; 8 channels of I2C for a variety of sensors; SATA2; the GPS baseband; and a variety of USB derivatives (USB Host 2.0, Device 2.0, and HSIC interfaces with PHY transceivers to be connected with 802.11n, Ethernet, HSPA+, and 4G LTE modem). The application processor also supports industry's first DDR based eMMC 4.4 interfaces to increase the file system's performance.
Exynos 4210 is available as FCMSP Package on Package (PoP), which has a 0.45mm ball pitch with LPDDR2 configuration. The MCP will depend upon the customer's requirement.

• ARM CortexA9 dual core subsystem with 64-/128-bit SIMD NEON
  - 32KB (Instruction)/32KB (Data) L1 Cache and 1MB L2 Cache
  - 1.2Hz and 1.0GHz Core Frequency: Voltage 1.2V
• 64-bit Multi-layered bus architecture
• Internal ROM and RAM for secure booting, security, and general purposes
• Memory Subsystem:
  - SRAM/ROM/NOR/NAND Interface with x8 or x16 data bus
  - OneNAND Interface with x16 data bus
  - 2-ports 32-bit 800Mbps LPDDR2/DDR2/DDR3 Interfaces
• 8-bit ITU 601/656 Camera Interface
• Multi-format Video Hardware Codec: 1080p 30fps (capable of decoding and encoding MPEG-4/H.263/H.264) and 1080p 30fps (capable of decoding MPEG-2/VC1)
• JPEG Hardware Codec
• 3D and 2D graphics hardware, supporting OpenGL ES 1.1/2.0, and OpenVG 1.1
• LCD single or dual display, supporting 24bpp RGB, MIPI
• Native triple display, supporting WSVGA LCD dual display and 1080p HDMI, simultaneously
• Composite TV-out and HDMI 1.3a interfaces
• GPS baseband integration with GPS RF interface
• 2-ports (4-lanes and 2-lanes) MIPI DSI and MIPI CSI interfaces
• 1-channel AC-97, 2-channel PCM, and 3-channel 24-bit I2S audio interface, supporting 5.1 channel audio
• 1-channel S/PDIF interface support for digital audio
• 8-channel I2C interface support for PMIC, HDMI, and general-purpose multi-master
• 3-channel high-speed SPI
• 4-channel high-speed UART (up to 3Mbps data rate for Bluetooth 2.1 EDR and IrDA 1.0 SIR)
• USB 2.0 Device 1-channel, supporting FS/HS (12Mbps/480Mbps) with on-chip PHY
• USB 2.0 Host 1-channel, supporting LS/FS/HS (1.5Mbps/12Mbps/480Mbps) with on-chip PHY
• USB HSIC 2-channel, supporting (480Mbps) with on-chip PHY
• Asynchronous Direct Modem Interface with 16KB DPSRAM
• 4-channel SD/MMC interface, supporting SD 2.0, HS-MMC 4.3, and 1ch HS-MMC 4.4 DDR 4-bit interface muxed with HS-MMC 4.3
• SATA AHCI 1-channel, supporting SATA1 (1.5Gbps) and SATA2 (3.0Gbps) with on-chip PHY
• 32-channel DMA Controller
• 14x8 keypad support
• 10-channel 12-bit multiplexed ADCs
• Configurable GPIOs
• Real time clock, PLLs, timer with PWM, and watchdog timer

Another development board

Along with that CPU the Origen board also has a Mali400 GPU and the DDR3 RAM is 1GB capacity. The board will cost devs  and has a wealth of connectivity options. Those connectivity options include interfaces for HDMI, SD cards, WiFi, Bluetooth, stereo sound, LCD, JTAG debug, and a camera. Software for the system will be offered from Linaro.

 provide its Linaro Evaluation Builds of Android and Ubuntu directly to devs from its website. The goal of the new Origen board is to help developers speed the time to market for new smartphones, tablets, and connected screens. The Exynos processor and DDR3 RAM are both on a small daughter board that will allow for future upgrades to the Origen board.