Layout and Termination Techniques in clock generatorfax id: 3612 Layout and Termination Techniques For Cypress Clock Generators Cypress Semiconductor makes a variety of PLL-based clock generators. This application note provides a set of recommendations to optimize usage of Cypress clock devices in a system. The application note begins with recommended termination techniques for clock generators. Subsequently, power supply filtering and bypassing is discussed. Finally, the application note provides some recommendations on board layout. Table 1. Length for Voltage Reflections tr (ns) 2 2 2 2 1 1 1 1 0.5 0.5 0.5 0.5 CD (pF) 10 20 40 80 10 20 40 80 10 20 40 80 L (inches) 4.73 4.32 3.74 3.05 2.16 1.87 1.53 1.18 0.93 0.76 0.59 0.44 Summary of Transmission Line Theory Typically, Cypress clock generators have low output impedances. When these dev……