用FPGA实现SDI(xapp1014-xilinx-sdi)赛灵思原厂资料
时间:2019-12-19
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用fpga实现SDI( xapp1014-xilinx-sdi)\474416720xapp1014-xilinx-sdi.zip.....................................\xapp1014_sec4_ASI_LVDS.zip.....................................\xapp1014_c17_aes3_rx_tx.zip.....................................\xapp1014_c18_asrc.zip.....................................\xapp1014_c19_asrc_multi_ch.zip.....................................\xapp1014_c20_ hd_audio_mux.zip.....................................\xapp1014_c21_hd_audio_demux.zip.....................................\xapp1014_c22_err_corr_emb_audio.zip.....................................\xapp1014_c23_sd_audio_demux.zip.....................................\xapp1014_c24_3G _audio_mux.zip.....................................\xapp1014_c25_3G_audio_demux.zip.....................................\xapp1014_c26_SMPTE352.zip.....................................\xapp1014_c5_GTP_SDI_RX.zip.....................................\xapp1014_c6_GTP_SDI_TX.zip.....................................\xapp1014_c7_GTP_SDI_PassThru.zip.....................................\xapp1014_c8_GTX_SDI.zip.....................................\xapp1014_sec3_SDI_LVDS.zip.....................................\............4_ASI_LVDS\dcfifo_2kx9.xco.....................................\......................\dcfifo_2kx9.edn.....................................\......................\v5asi_demo.bit.....................................\......................\asi_par_framer.vhd.....................................\......................\asi_stimulus.vhd.....................................\......................\checker.vhd.....................................\......................\decoder_8b10b.vhd.....................................\......................\dvb_fifo.vhd.....................................\......................\encoder_8b10b.vhd.....................................\......................\link_ctl.vhd.....................................\......................\ml571_ad5320.vhd.....................................\......................\pkg_8b10b.vhd.....................................\......................\precess_dru.vhd.....................................\......................\rxdata_path.vhd.....................................\......................\serializer_10b1b_v5.vhd.....................................\......................\syncrst_gen.vhd.....................................\......................\txdata_path_v5.vhd.....................................\......................\v5asi_clkgenpll.vhd.....................................\......................\v5asi_rxtx.vhd.....................................\......................\v5asi_txclkgen.vhd.....................................\......................\dcfifo_2kx9_fifo_generator_v4_3_xst_1.ngc.....................................\......................\v5asi_rxtx_top.ucf.....................................\......................\asi_stimulus.v.....................................\......................\checker.v.....................................\......................\dcfifo_2kx9.v.....................................\......................\decoder_8b10b.v.....................................\......................\decoder_8b10b_const.v.....................................\......................\dvb_fifo.v.....................................\......................\encoder_8b10b.v.....................................\......................\link_ctl.v.....................................\......................\ml571_ad5320.v.....................................\......................\precess_dru.v.....................................\......................\rxdata_path.v.....................................\......................\serializer_10b1b_v5.v.....................................\......................\syncrst_gen.v.....................................\......................\txdata_path_v5.v.....................................\......................\v5asi_clkgenpll.v.....................................\......................\v5asi_rxtx.v.....................................\......................\v5asi_txclkgen.v.....................................\......................\readme.txt.....................................\......................\__Previews\asi_par_framer.vPreview.....................................\......................\..........\asi_par_framer.vhdPreview.....................................\......................\..........\asi_stimulus.vPreview.....................................\......................\..........\asi_stimulus.vhdPreview.....................................\......................\..........\checker.vPreview.....................................\......................\..........\checker.vhdPreview.....................................\......................\..........\dcfifo_2kx9.vPreview.....................................\......................\..........\decoder_8b10b.vPreview.....................................\......................\..........\decoder_8b10b.vhdPreview.....................................\......................\..........\decoder_8b10b_const.vPreview.....................................\......................\..........\dvb_fifo.vPreview.....................................\......................\..........\dvb_fifo.vhdPreview.....................................\......................\..........\encoder_8b10b.vPreview.....................................\......................\..........\encoder_8b10b.vhdPreview.....................................\......................\..........\link_ctl.vPreview.....................................\......................\..........\link_ctl.vhdPreview.....................................\......................\..........\ml571_ad5320.vPreview.....................................\......................\..........\ml571_ad5320.vhdPreview.....................................\......................\..........\pkg_8b10b.vhdPreview.....................................\......................\..........\precess_dru.vPreview.....................................\......................\..........\precess_dru.vhdPreview.....................................\......................\..........\rxdata_path.vPreview.....................................\......................\..........\rxdata_path.vhdPreview.....................................\......................\..........\serializer_10b1b_v5.vPreview.....................................\......................\..........\serializer_10b1b_v5.vhdPreview.....................................\......................\..........\syncrst_gen.vPreview.....................................\......................\..........\syncrst_gen.vhdPreview.....................................\......................\..........\txdata_path_v5.vPreview.....................................\......................\..........\txdata_path_v5.vhdPreview.....................................\......................\..........\v5asi_clkgenpll.vPreview.....................................\......................\..........\v5asi_clkgenpll.vhdPreview.....................................\......................\..........\v5asi_rxtx.vPreview.....................................\......................\..........\v5asi_rxtx.vhdPreview.....................................\......................\..........\v5asi_txclkgen.vPreview.....................................\......................\..........\v5asi_txclkgen.vhdPreview.....................................\......................\History\asi_par_framer.~(1).v.Zip.....................................\......................\asi_par_framer.v.....................................\......................\FPGA_Project1.PrjFpg.....................................\............3_SDI_LVDS\icon.edn.....................................\......................\ila.edn.....................................\......................\anc_demux.vhd.....................................\......................\anc_edh_pkg.vhd.....................................\......................\anc_edh_processor.vhd……
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