【应用笔记】在FPGA器件中实现乘法器(Implementing Multipliers in FPGA Devices)
时间:2019-12-24
大小:732.9KB
阅读数:190
查看他发布的资源
资料介绍
【应用笔记】在FPGA器件中实现乘法器(Implementing Multipliers in FPGA Devices)
Stratix® II, Stratix, Stratix GX, Cyclone™ II和Cyclone器件中有专用的结构功能,可以很容易实现高性能乘法器。
Stratix® II, Stratix, Stratix GX, Cyclone™ II, and Cyclone devices have
dedicated architectural features that make it easy to implement highperformance
multipliers. Stratix II, Stratix, and Stratix GX devices feature
embedded high-performance multiplier-accumulators (MACs) in
dedicated digital signal processing (DSP) blocks. DSP blocks can operate
at data rates above 300 million samples per second (MSPS), making
Stratix II, Stratix, and Stratix GX devices ideal for high-speed DSP
applications. Cyclone II devices have embedded multiplier blocks for
DSP. Implementing Multipliers in
FPGA Devices
July 2004, ver. 3.0 Application Note 306
Introduction Stratix II, Stratix, Stratix GX, Cyclone II, and Cyclone devices have
dedicated architectural features that make it easy to implement high-
performance multipliers. Stratix II, Stratix, and Stratix GX devices feature
embedded high-performance multiplier-accumulators (MACs) in
dedicated digital signal processing (DSP) blocks. DSP blocks can operate
at data rates above 300 million samples per second (MSPS), making
……
版权说明:本资料由用户提供并上传,仅用于学习交流;若内容存在侵权,请进行举报,或
联系我们 删除。