This application note is developed based on low latency design. It provides an algorithm, which is designed to use the SPI/I 2 C™ interrupts, to achieve the required communication and enable optimum processor usage. The algorithm is developed based on the PIC18 Master Synchronous Serial Port (MSSP) module with external Serial Peripheral Interface (SPI) EEPROMs and I 2 C EEPROMs, respectively. The algorithm uses an interrupt driven approach. AN1243 Low Latency Driver to Access External EEPROM Using PIC18 Family Devices Authors: Obul Reddy and Ganesh Krishna S.M Disadvantages of Conventional Approach Microchip Technology Inc. External EEPROM chips, connected via SPI or I2C, tend to consume a lot of microcontroller throughput to communicate. The routines accessing the EEPROM INTRODUCTION will have to wait until the communication is reliably This application note is developed based on low latency completed. During t……