原创 Cycle-accurate core consumes only 308 FPGA LUTs

Hi Max, I just wanted to let you know that we've released the MCL86 -- a micro-sequencer-based, cycle-accurate 8088/8086 soft processor core that consumes only 308 LUTs, which is less than one percent of the smallest Kintex-7 FPGA from Xilinx.

Like the original microprocessor, the MCL86 core's Execution Unit (EU) is independent from the Bus Interface Unit (BIU), thereby providing the user with the freedom to select any type of local bus interface to their FPGA or ASIC design. A cycle-compatible 8088 BIU is provided with the MCL86 core as an example.

Its ultra-small footprint, low power, and cycle compatibility make the MCL86 an ideal choice for an embedded controller that is supported by thousands of applications, tools, and resources dedicated to this extremely well-known instruction set.

Please visit us at MicroCoreLabs.com to see video demonstrations of the core running popular desktop applications on real hardware.

Edward also included the following photograph of his "Time-Warp" 1985 workstation. As he noted, it wasn't possible to come up with a picture of the "core" that wasn't some boring snapshot of an FPGA with wires sticking out of it, so instead he created a "blast from the past" image that includes some dot-matrix-printed assembly code, a vintage IBM keyboard and monitor, and some large ASCII graphics that are reminiscent of mainframe line printer printouts. The point is that this computer display is being driven by his MCL86 core -- pretty nifty, eh?

 

Oooh! What can I say? I used to love playing with micro-sequencer-based CPUs although -- if the truth be told -- the CPUs in question were mainframes and this was way back in the mists of time we used to call the beginning of the 1980s. I actually started to develop a micro-sequencer-based design for a 4-bit CPU as a paper exercise a few years ago, but it made my head hurt, so I stopped.

Of course, I then began to wonder as to Edward's background and why he had created this core in the first place, so I posed these questions to him and he responded as follows:

I have over 20 years' experience with FPGA datapath development. Recently, I became interested in ultra-small micro-sequencer-based designs. Since I am a big fan of the Intel 8086/8088, I decided to make it a goal to create a soft core of this processor. I knew that the 8086 and other processors in that era used microcode to implement certain complicated CISC instructions. Also, I was inspired by Nick Tredennick's book, Microprocessor Logic Design, in which he outlined his method for developing the microcode for the Motorola 68000. I then wondered if a CISC processor like the 8086 could be developed entirely with microcode rather than just the complicated instructions. If so, then it would result in an extremely small footprint as the only FPGA logic that would be required would be for the micro-sequencer and its ROM. This would also allow the possibility of the core being cycle-compatible with the original processor, so this is what I set out to accomplish.

The result is the MCL86, which is basically a 7-instruction, 32-bit micro-sequencer. Some of the micro-sequencer's instructions are specialized so as to allow it to rapidly decode instructions as well as nest function calls. With these seven instructions, I was able to microcode all of the 8086 opcodes in a relatively small number of micro-sequencer clocks.

The micro-sequencer runs at 100 MHz, which gives me plenty of clock cycles to emulate the original 4.77 MHz processor. At this clock speed, the core is cycle-compatible with the original x86 microprocessor. This feature can easily be disabled for users who don't need cycle compatibility and want to run as fast as possible. (The core can run up to 180 MHz inside of a Kintex-7 FPGA). Being cycle compatible was easy to implement and allowed me to actually replace the original 8088 from an IBM motherboard with my core running in an FPGA. I have a YouTube channel linked from my website showing some popular desktop applications running on my core via an IBM XT.

The Intel 8086 and 8088 microprocessors share the same Execution Unit (EU) core and only differ by their Bus Interface Units (BIUs). The MCL86 shares this same separation, so the user is able to connect any kind of bus interface to the EU core that they require. The MCL86 core is supplied with an example 8088 BIU, but the user can create a 16-bit 8086 type of BIU or something customized to their FPGA or ASIC fabric.

The MCL86 EU core consumes only 308 LUTs, which is less than one percent of the logic available in the smallest Kintex-7 FPGA. Also, this is less than one tenth the size of comparable x86 soft cores that are implemented with logic in the traditional way.

My hope is to interest people in the idea of using a micro-sequencer-based microcontroller in their FPGA or ASIC designs, rather than cores created with large amounts of FPGA logic. I think the preference of many engineers is to minimize controller footprints as well as power consumption, so they may prefer a smaller and more powerful 16-bit microcontroller like the MCL86 to a traditional implementation of an 8-bit 8051.

Having said this, I do plan on making a micro-sequencer-based 8051 at some point, which might attract more users since it is an 8-bit core. The market for 8051s is pretty crowded and competitive, but it may be that an ultra-small, micro-sequencer-based implementation will stand out from the crowd. It wouldn't be the fastest, but would (probably) be the smallest. I think some designers are less concerned with speed and more concerned with power and footprint. I figure these designers want their embedded controller to take the least amount of space inside of their FPGA/ASIC, and they would like to run at as low a clock speed as they can to minimize power consumption. Of course, maybe that's not what other engineer's want -- maybe it's just me -- we will see!

Well, I for one am rather excited by this. I agree that many designers would be happy to trade off high speed for lower size and power consumption. I also think that if this 16-bit core takes off, then it would be worthwhile creating a whole raft of micro-sequencer-based 16-bit processor cores. Last but not least, I would be really interested in seeing a micro-sequencer-based 8-bit 8051 core and comparing this to other implementations. What say you?