As silicon technology advances to enable higher density ASICs, the core logic voltage decreases. The lower voltage, in combination with higher current requirements, requires tighter tolerances on the power supplies. The control of the power supplies from the PCB to the die is the subject of this study. A frequency sweep simulation using typical bypass values shows that a discrete package capacitor is not a signifcant factor in reducing the chip core power supply fuctuation. A small voltage boost at the PCB sup-ply can provide a more economical solution to managing the device supplies.Power Supply Control from PCB to Chip Core White Paper By: Nur Devnani, Eileen Murray Avago Technologies Abstract As silicon technology advances to enable higher density As shown in Figure1, the core power supply network in ASICs, the core logic voltage decreases. The lower voltage, the substrate includes the following interconnects: in combination with higher current requirements, requires Chip -> Flip Chip (FC) bumps tighter tolerances on the power supplies. The control of the power supplies from the PCB to the die is the subject FC bumps -> Via from FC bumps of this study. A frequency sweep simulation using typical Via from FC bumps ……