Design of PLLs[1]Design of Monolithic PLL Meng Chih Weng 2006.7.26 Outline The PLL introduction & considerations Voltage-controlled oscillators PFD & charge pump & divider PLL jitter considerations Measurement Delay Locked Loop P.2 STC MCWeng The PLL Introduction & Considerations PLL Architecture Why Phase Lock Charge-Pumped PLL PLL Parameters & Bandwidth P.3 STC MCWeng PLL Architecture Feedback: Vin(t) + A CP Vout(t) PLL: Φ in(t) UP Ip PFD DN Ip VC R C1 VCO C2 Φ out(t) PFD: Phase/frequency Detector CP: Charge pump VCO: Voltage-Controlled Oscillator Only phase information is important to PLL operation P.4 STC MCWeng The PLL Introduction & Considerations PLL Architecture Why Phase Lock Jitter Reduction Skew Suppression Frequency Synthesis Clock Recovery Char……