一个完整的MIPS CPU，创新设计，浙江大学某学生作品，有完整的说明文档、仿真文件和测试文件，可以直接综合和仿真.文件列表: MIPS ....\ISE ....\...\global_map.ncd ....\...\global_map.ngm ....\...\global_pad.csv ....\...\global_pad.txt ....\...\ISE.dhp ....\...\ISE.npl ....\...\main.bld ....\...\main.cmd_log ....\...\main.mrp ....\...\main.ncd ....\...\main.ngc ....\...\main.ngd ....\...\main.ngm ....\...\main.ngr ....\...\main.pad ....\...\main.pad_txt ....\...\main.par ....\...\main.par_nlf ....\...\main.syr ....\...\main.twr ....\...\main.twx ....\...\main_map.ncd ....\...\main_map.ngm ....\...\main_pad.csv ....\...\main_pad.txt ....\...\main_TEST_v_tf.tdo ....\...\main_timesim.nlf ....\...\main_timesim.sdf ....\...\main_timesim.v ....\...\TEST.v ....\...\transcript ....\...\vsim.wlf ....\...\work ....\...\xst ....\...\...\work ....\...\...\....\hdllib.ref ....\...\...\....\vlg0A ....\...\...\....\.....\Data_Memory.bin ....\...\...\....\vlg15 ....\...\...\....\.....\global.bin ....\...\...\....\vlg20 ....\...\...\....\.....\Registers.bin ....\...\...\....\vlg2D ....\...\...\....\.....\main.bin ....\...\...\....\vlg30 ....\...\...\....\.....\Decode.bin ....\...\...\....\vlg3B ....\...\...\....\.....\Code_Memory.bin ....\...\...\....\vlg41 ....\...\...\....\.....\Control.bin ....\...\...\....\vlg47 ....\...\...\....\.....\Execute.bin ....\...\...\....\vlg62 ....\...\...\....\.....\Fetch.bin ....\...\_ngo ....\...\__projnav ....\...\.........\global.xst ....\...\.........\ISE.gfl ....\...\.........\ISE_flowplus.gfl ....\...\.........\main.xst ....\...\.........\posttrc.log ....\...\__projnav.log ....\mips.doc ....\ModelSim ... ...……