Zynq UltraScale+ RFSoC Data Sheet：Overview

The Zynq UltraScale+TM RFSoC family integrates key subsystems for multiband multi-mode cellular radios and cable infrastructure(DOCSIS) into an SoC platform that contains feature-rich64-bit quad-core Arm CortexTM-A53 and dual-core Arm Cortex-R5 based processing system.

Combining the processing system with UltraScaleTM architecture programmable logic and RF-ADCS, RF-DACS, and soft-decision FECS, the Zynq UltraScale+ RFSoC family is capable of implementing a complete software-defined radio including direct RF sampling data converters, enabling CPRITM and gigabit Ethernet-to-RF on a single, highly programmable SoC.

Zynq UltraScale+ RFSoCs integrate up to 16 channels of RF-ADCs and RF-DACs all with excellent noise spectral density. The RF data converters also include power efficient digital down converters(DDCs)and digital up converters(DUCs) that include programmable interpolation and decimation, NCO, and complex mixer. The DDCs and DUCs can also support dual-band operation. See Table 1 for key features and sample rates.