74LS113.pdf 54LS113 Dual JK Edge-Triggered Flip-Flop June 1989 54LS113 Dual JK Edge-Triggered Flip-Flop General Description The 54LS113 offers individual J K Set and Clock inputs When the clock goes HIGH the inputs are enabled and data may be entered The logic level of the J and K inputs may be changed when the clock pulse is HIGH and the bistable will perform according to the Truth Table as long as mini- mum setup and hold times are observed Input data is trans- ferred to the outputs on the falling edge of the clock puls……