代码如下:
- `timescale 1 ns/ 1 ps
- module LAMP_vlg_tst();
- // constants
- // general purpose registers
- reg eachvec;
- // test vector input registers
- reg clk;
- reg rst_n;
- // wires
- wire led;
- // assign statements (if any)
- LAMP i1 (
- // port map - connection between master ports and signals/registers
- .clk(clk),
- .led(led),
- .rst_n(rst_n)
- );
- reg [7:0] memory [15:0];
- parameter index=0;
- initial begin
- $readmemh("memory.list", memory);
- end
- reg [3:0] scan;
- initial begin:qushu
- if(index>0)
- for(scan=0;scan<index;scan=scan+1)
- if(memory[scan]>0)
- begin
- $display("%d",memory[scan]);
- memory[scan]=0;
- end
- else
- $display("error--indexiszero");
- end
- endmodule
如果index=0,运行结果什么也打印不出来
按道理来讲,应该打印error--indexiszero。
请高手指教,谢谢!