In data networking applications, both internal and external memory bandwidth often are the bottlenecks of the design. Several techniques are introduced here to solve the internal memory bandwidth bottleneck.
1.1 Single write-port multi-read-port RAM
If an internal memory only needs one write port but several read ports, a simple duplication technique can solve the problem. In the diagram shown below, one-write-port two-read-port RAM is created by duplication the memories. The write ports of the two RAMs are connected together so both RAMs have the same content. Each has its own read port.
For counters stored in a RAM, updates involve read-modify-write operation. Each update requires one read and one write to the RAM. Often time, the increment and decrement come from different processes. If the total bandwidth requirement exceeds the limit of the RAM, a technique of separating the increment from the decrement can be used to solve the problem.
The process issuing the counter increment requests operates on the “inc_cnt” RAM. The process issuing the counter decrement requests operates on the “dec_cnt” RAM. The actual counter value is the difference between the two.
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